This study proposed the twin poly-Si fin field-effect transistor (FinFET) nonvolatile memory with a structure that is composed of Ω-gate nanowires (NWs). Experimental results show that the NW device has superior memory characteristics because its Ω-gate structure provides a large memory window and high program/erase efficiency. With respect to endurance and retention, the memory window can be m...

Background/Objective: The important challenge for the realization of hearing aids is small size, low cost, power consumption, and better performance, etc. Keeping these requirements in view this work concentrates on VLSI (Very Large Scale Integrated) implementation analog circuit that mimics PPSK (Passive Phase Shift Keying) demodulator with a pass filter. Methodology: This research deals RF Co...

The size and parameter optimization for the 5-nm carbon nanotube field effect transistor (CNFET) static random access memory (SRAM) cell was presented in Part I of this article. Based on that work, we propose a (CNT) SRAM array composed schematically optimized CNFET CNT interconnects. We consider interconnects inside metallic single-wall (M-SWCNT) bundles to represent metal layers 0 1 (M0 M1). ...

Building Artificial Neural Network accelerators by implementing the vector-matrix multiplication in analog domain relies on development of non-volatile and tunable resistances. In this work, we describe nanofabrication a three-dimensional HZO—WO x Fin Ferroelectric Field Effect Transistor (FinFeFET) with back-end-of-line conditions. The metal-oxide channel (WO ) is structured into fins engineer...