Data networks have traditionally been based upon a simple routing and forwarding service provided by the network, with all complexity, for services like reliability and congestion control, placed in end-to-end algorithms run by hosts attached to the network. A fundamentally more powerful network architecture is one in which internal network nodes provide a richer service abstraction. The increa...

We propose an efficient high-performance scaling algorithm based on the oriented polynomial image model. We develop a simple classification scheme that classifies the region around a pixel as an oriented or nonoriented block. Based on this classification, a nonlinear oriented interpolation is performed to obtain high quality video scaling. In addition, we also propose a generalization that can ...

Performance of high-speed multiprocessor systems is limited by the available bandwidth to memory and the need to synchronize write sharable data. This paper presents a new memory system that separates synchronization related data from others. The memory system has two tiers: synchronization memory and high bandwidth (HB) memory. The synchronization memory consists of snooping caches connected t...

With current low-cost high-performance workstations, application-to-application throughput is limited more by host memory bandwidth than by the cost of protocol processing. Conventional network architectures are inefficient in their use of this memory bandwidth, because data is copied several times between the application and the network. As network speeds increase further, network architecture...

Hardware-assisted garbage collection offers the potential of high average-case allocation rates and memory bandwidth, with very low worst-case allocation, fetch, and store times. This paper describes an architecture that allows memory fetch and store operations to execute, on the average, nearly as fast as traditional memory. The architecture is high-performance in that it includes support for ...

This paper describes the architecture of a high performance, compact image processing system. The system feature is that an image processor is constructed by employing eight kinds of high speed VLSIs, including real-time video image processing LSI(1SP-11). These VLSIs are developed while realizing both compactness and easy system extensions. The ISP-I1 is a VLSI for gray scale image processing....

After decades of evolution, the network requirements of data centers, supercomputers, and cloud computing facilities are beginning to converge requiring high performance network access while supporting a secure computing environment for numerous concurrently running applications with complex interaction policies. Unfortunately, current network technologies are unable to simultaneously provide h...

GRIP is a high-performance parallel machine designed to execute functional programs using supercombinator graph reduction. It uses a high-bandwidth bus to provide access to a large, distributed shared memory, using intelligent memory units and packet-switching protocols to increase the number of processors which the bus can support. GRIP is also being programmed to support parallel Prolog and D...

The proposed work describes a highly parallel architecture for high performance optical flow computation. This system implements the efficient Lucas and Kanade algorithm with multi-scale extension for the computation of large motion estimations. This work deals with the architecture, evaluation of the accuracy and system performance. It also has extension to the original L&K algorithm. So the c...

PATROCLOS (parallel transport subsystem for cell-based high-speed networks) is a transport subsystem to support modern applications, such as multi-media applications, in high-speed network environments. PATROCLOS increases the throughput performance by the integration of protocol and implementation issues. It provides the required functionalities between the media access layer interface of cell...