The work is based on Current Starved Voltage controlled oscillator (CSVCO) for a Phase Locked Loop (PLL) in 180 nm process. Phase locked loop’s were used in most of the application for clock generation and recovery as well. As the technology grows faster in the existing generation, there has to be quick development with the technique. In most of the application PLL’s were used for clock and dat...

In grid connected applications the synchronization of output signals of the converters to be connected with grid parameters frequency and phase is of great importance. Different methods based on Fourier transforms, zero-crossing detection, Kalman filters, phase-locked loops (PLL) and others are used for this synchronization. This paper presents a new PLL for synchronization of the output curren...

A microprocessor clock generator based upon an analog phase-locked loop (PLL) is described for deskewing the internal logic control clock to an external system clock. This PLL is fully integrated onto a 1.2-million-transistor microprocessor in 0 . 8 p CMOS technology without the need for external components. It operates with a lock range from 5 up to 110 MHz. The clock skew is less than 0.1 ns,...

An all-digital fractional-N Phase-Locked Loop (PLL) built with standard cells and digital synthesis tools allows easier integration with digital blocks and portability to different processes or technologies. This paper presents a PLL built with standard cells and digital synthesis tools and achieves good jitter performance. It uses an embedded time-to-digital converter (TDC) with multipath to i...

approved: _____________________________________________________ Un-Ku Moon Kartikeya Mayaram Circuits operating outside the earth’s atmosphere are more vulnerable to cosmic radiation and require special design consideration. The purpose of this work is to explore methods of mitigating the effect of radiation in phase locked loop (PLL) circuits. Several voltage controlled oscillators (VCOs) and ...

Phase locked loop (PLL) is one of the most critical devices in modern electronic systems. PLLs are widely used as clock generator or frequency synthesis in communication systems, computers, radio and other electronic applications. Phase noise represents the phase variations of a PLL output signal and is the most important characteristic of PLLs because it reflects the stability of PLL systems. ...

In this paper we study and present some results on the performances of frequency tracking for Ka-band satellite communications in rain fading channels. The carrier frequency is tracked using a 2 order hyperbolic phase detector based digital-phase locked loop (D-PLL). The hyperbolic D-PLL has the capability of extending the tracking range compared to the other D-PLL and hence can be designed suc...

Modern high-speed CMOS processors using on-chip phase-locked loop (PLL) often require a clock buffer with stringent specifications on the rising time and falling time of the signal rather than on the delay time of the buffer. For these applications, we propose a novel low-power high-driving ability voltage controlled oscillator (LPVCO) used in PLL. The proposed LPVCO is based on the waveformsha...

The problem of robust phase-locked loop design has attracted attention for many years, particularly since the advent of the global positioning system. This paper proposes and demonstrates the use of a fuzzy PLL to estimate the time-varying phase of a sinusoidal signal. It is shown via simulation results that fuzzy PLL's offer performance comparable to analytically derived PLL's (e.g. Kalman fil...