Abstract In this paper, according to the three-loop control structure, FPGA is used as chip of current loop, and parallel multi-axis motor realized by hardware nation. The loop code written in Verilog HDL language, simulation results each module are given SignalTap tool. main contents include a sampling multichannel encoder, current, vector coordinate transformation (CLARK module, PARK IPARK mo...

Well-performing control loops have an integral role in efficient and sustainable industrial production. Control performance monitoring (CPM) tools are necessary to establish further process optimization preventive maintenance. Data-driven, model-free approaches studied this research by comparing the of nine CPM methods industrially relevant simulation. The robustness some is considered with var...

We present a method for constructing seamless parametrization surfaces of any genus, which can handle feasible cone configuration with type cones. The mapping is guaranteed to be locally injective, due careful construction simple domain boundary polygon. polygon’s complexity depends on the cones in field, and it independent mesh geometry. result small polygon that optimized prior interior mappi...