A new approach to diagnostic testing of embedded memories is presented which enables the design of tests that provide complete detection and distinguishing of all faults in a given fault model. The approach is based on decomposition of functional memory faults into basic fault effects and output tracing. Output tracing involves storing all read operation results for defective memory cells and r...

If metaphor is to be viewed as a fundamental cognitive agency, as recent work suggests, what ramifications does this view have for a model of semantic memory? This paper presents a computational treatment of metaphor comprehension, named Sapper (see Veale & Keane. 1993, 1994; Veale et al. 1995, 1996), which is built upon a parallel, adaptive, and learning network model of semantic memory. Sappe...

New applications of nite automata, such as NLP and asynchronous circuit simulation, can require automata of millions or even billions of states. All known construction methods (in particular, the interesting reachability-based ones that save memory, such as the subset construction, and simultaneously minimizing constructions, such as Brzozowski's) have intermediate memory usage much larger than...

This paper describes a virtually pipelined memory architecture built on a dual-port phase change memory (PCM) substrate for high performance networking applications. The proposed dual-port PCM cell significantly reduces the probability of bank conflicts due to blocking writes, ensuring that the proposed memory architecture can provide the large bandwidth and bank parallelism necessary for such ...

Abstract 2LS is a C program analyser built upon the CPROVER infrastructure that can verify and refute assertions, memory safety, termination. Until now, one of main drawbacks was its inability to most programs with arrays. This paper introduces new abstract domain in for reasoning about contents In addition, we introduce an improved approach loop unwinding, crucial component 2LS’ verification a...

In this paper, we propose a new transparent Built-In Self-Diagnosis ( BISD ) method to diagnose multiple embedded memory arrays with various sizes an parallel. A new tmnspamnt diagnostic interface has been proposed to perform testing in n m l mode. By tolerating redundant read/urite/shift operations, we develop a new mamh algorithm called TDiagRSMarch to achieve the y w l s of low hardware over...

Scalability is a main obstacle for applying Model-Driven Engineering to reverse engineering, or to any other activity manipulating large models. Existing solutions to persist and query large models are currently inefficient and strongly linked to memory availability. In this paper, we propose a memory unload strategy for Neo4EMF, a persistence layer built on top of the Eclipse Modeling Framewor...

A new microcode-based BIST(Built-In Self Test) circuitry for embedded memory components is proposed in this paper. The memory BIST implements march algorithms which are slightly modified by adopting DOF(Degree of Freedom) concept to detect ADOFs(Address Decoder Open Faults) on top of conventional stuck faults. Furthermore it is shown that the march BIST modified can capture a few NPSFs(Neighbor...

Modern computers are built upon heterogeneous multi-core/many cores architectures (e.g. GPGPU connected to multi-core CPU). Achieving peak performance on these architectures is hard and may require a substantial programming effort. High-level programming patterns, coupled with efficient low-level runtime supports, have been proposed to relieve the programmer from worrying about low-level detail...

Reconfigurable computers usually provide a limited number of different memory resources, such as host memory, external memory, and on-chip memory with different capacities and communication characteristics. A key challenge for achieving highperformance with reconfigurable accelerators is the efficient utilization of the available memory resources. A detailed knowledge of the memories’ parameter...