نتایج جستجو برای: networks on chip
تعداد نتایج: 8605158 فیلتر نتایج به سال:
An all-digital on-chip delay sensor (OCDS) circuit with high delay-measurement resolution and low supply-voltage sensitivity for efficient detection and diagnosis in high-performance electronic system applications is presented. Based on the proposed delay measurement scheme, the quantization resolution of the proposed OCDS can be reduced to several picoseconds. Additionally, the proposed cascad...
Approaching ideal wire latency using a network-on-chip (NoC) is an important practical problem for many-core systems, particularly hundreds-cores. Although other researchers have focused on optimizing large meshes, bypassing or speculating router pipelines, or creating more intricate logarithmic topologies, this paper proposes a balanced combination that trades queue buffers for simplicity. Pre...
Three-Dimensional Networks-on-Chip (3D-NoC) has been presented as an auspicious solution merging the high parallelism of Network-on-Chip (NoC) interconnect paradigm with the high-performance and lower interconnect-power of 3-dimensional integration circuits. However, 3D-NoC systems are exposed to a variety of manufacturing and design factors making them vulnerable to different faults that cause...
The Network-on-Chip (NoC) is an enabling technology to integrate large numbers of embedded cores on a single die. The existing methods of implementing a NoC with planar metal interconnects are deficient due to high latency and significant power consumption arising out of multi-hop links used in data exchange. To address these problems, we propose design of a hierarchical small-world wireless No...
Many synthesis works discussed emerging technology networks−on−chip (NoC) from different aspects. These works were and still are a solid foundation of the state of the art for emerging technology NoC research and practices. However, with respect to their quality and conciseness, the available literature is outdated or don’t give an extensivere view of the available contributions in this area. I...
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Socware is the name for a new design cluster in Sweden, which intends to unify university, research institutes, and industry towards a common goal, namely System-on-Chip. In this paper, one of the programs within the cluster, the Socware Research & Education Program, is presented. The program aims to organize a new education curriculum for System-on-Chip design. The education is directed to und...
in this study, effect of two genotype imputation strategies, relatedness between reference panel and test populations and minor allele frequency on imputation error rate were examined with using a stochastic simulated population. reference panel and test populations were composed of 1,000 and 500 individuals, respectively. individuals in the reference panel were genotyped with using a high and ...
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