The effects of a corona-discharge plasma treatment on the performance of an AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistor fabricated onto Si substrates were studied. The threshold voltage shifted from −8.15 to −4.21 V when the device was treated with an Al2O3 layer. The leakage current was reduced from 2.9 × 10−5 to 4.2 × 10−7 mA/mm, and the ION/IOFF ratio increased from...

We report on the fabrication of coplanar dual-gate ZnO thin-film transistors with 200-nm thickness SiNx for both top and bottom dielectrics. The ZnO film was deposited by RF magnetron sputtering on SiO2/Si substrates at 100◦C. And the thickness of ZnO film is compared with 100-nm and 40-nm. This TFT has a channel width of 100-μm and channel length of 5-μm. The fabricated coplanar dual-gate ZnO ...

We report the experimental demonstration of deepsubmicrometer inversion-mode In0.75Ga0.25As MOSFETs with ALD high-k Al2O3 as gate dielectric. In this letter, n-channel MOSFETs with 100–200-nm-long gates have been fabricated. At a supply voltage of 0.8 V, the fabricated devices with 200–130-nm-long gates exhibit drain currents of 232–440 μA/μm and transconductances of 538–705 μS/μm. The 100-nm d...

High performance single-walled carbon nanotube field effect transistors SWCNT-FETs fabricated with thin atomic layer deposited ALD Al2O3 as gate dielectrics and passivation layer are demonstrated. A 1.5 m gate-length SWCNT-FETs with 15 nm thick Al2O3 insulator shows a gate leakage current below 10−11 A at −2.5 V Vg +7 V, a subthreshold swing of S 105 mV/decade, and a maximum on current of −12 A...

In this paper, we extend our studies on the use of zero impact ionization and zero subthreshold swing field-effect-transistor (Z-FET) as a capacitor-less one-transistor dynamic random access memory (1TDRAM) through both experiment and TCAD simulation. The data retention time is measured as a function of biasing, temperature and device dimensions, leading to a simple predictive model. An alterna...

We report the fabrication of ionic liquid (IL)-gated field-effect transistors (FETs) consisting of bilayer and few-layer MoS2. Our transport measurements indicate that the electron mobility μ ≈ 60 cm(2) V(-1) s(-1) at 250 K in IL-gated devices exceeds significantly that of comparable back-gated devices. IL-FETs display a mobility increase from ≈ 100 cm(2) V(-1) s(-1) at 180 K to ≈ 220 cm(2) V(-...

Scaling of silicon (Si) transistors is predicted to fail below 5-nanometer (nm) gate lengths because of severe short channel effects. As an alternative to Si, certain layered semiconductors are attractive for their atomically uniform thickness down to a monolayer, lower dielectric constants, larger band gaps, and heavier carrier effective mass. Here, we demonstrate molybdenum disulfide (MoS2) t...

We report electrical characterization of monolayer molybdenum disulfide (MoS2) devices using a thin layer of polymer electrolyte (PE) consisting of poly(ethylene oxide) (PEO) and lithium perchlorate (LiClO4) as both a contact-barrier reducer and channel mobility booster. We find that bare MoS2 devices (without PE) fabricated on Si/SiO2 have low channel mobility and large contact resistance, bot...

This letter demonstrates a p-type raised source-and-drain (raised S/D) junctionless thin-film transistors (JL-TFTs) with a dual-gate structure. The raised S/D structure provides a high saturation current (>1 μA/μm). The subthreshold swing (SS) is 100 mV/decade and the drain-induced barrier lowering (DIBL) is 0.8 mV/V, and the I on/I off current ratio is over 10(8) A/A for L g = 1 μm. Using a th...

Electric-double-layer (EDL) thin-film transistors (TFTs) have attracted much attention due to their low operation voltages. Recently, EDL TFTs gated with radio frequency (RF) magnetron sputtered SiO₂ have been developed which is compatible to large-area electronics fabrication. In this work, fully transparent Indium-Gallium-Zinc-Oxide-based EDL TFTs on glass substrates have been fabricated at r...