Embedded SRAMs can occupy the majority of the chip area in SoCs. The increased process spreads of modern scaled-down technologies and non-catastrophic defect-related sensitivity to environmental parameters can compromise the stability of SRAM cells, which is quantified by a low Static Noise Margin (SNM). A Stability Fault (SF) can present itself in a cell whose SNM is so small that it can accid...

The research in wireless communications and in-vehicle computing systems has opened up new fields of applications for transportation systems. Vehicular ad hoc networks (VANETs) emerge as a contribution to the solution of providing safer and more efficient roads and to increase passenger safety. This thesis treats different issues that influence the performance of wireless vehicle communication ...

The bERLinPro project, a 100 mA, 50 MeV superconducting RF (SRF) Energy Recovery Linac (ERL) is under construction at Helmholtz-Zentrum Berlin for the purpose of studying the technical challenges and physics of operating a high current, c.w., 1.3 GHz ERL. This machine will utilize three unique SRF cryomodules for the injector, booster and linac module respectively. The booster cryomodule will c...

This paper proposes a test-case design method for black-box testing, called “Feature Oriented Testing (FOT)”. The method is realized by applying Feature Models (FMs) developed in software product line engineering to test-case designs. We develop a graphical language for test-case design called “Feature Trees for Testing (FTT)” based on FMs. To firmly underpin the method, we provide a formal sem...

An important aspect in the design of hardware/software systems is design-for-test. Improving the testability of a hardware/software system typically implies improving the controllability and observability of the internal system behavior. This can be achieved by introducing Points of Control and Observation (PCOs) in a system. In this paper, we examine the effects of PCO insertion in a behaviora...

| This tutorial responds to the rapidly increasing use of various cores for implementing systems-on-a-chip. It speci cally focusses on processor cores. We will give some examples of cores, including DSP cores and application-speci c instruction-set processors (ASIPs). We will mention market trends for these components, and we will touch design procedures, in particular the use compilers. Finall...

IC AND SYSTEM designers continue to grapple with the challenges of ensuring high performance under tight power consumption constraints, escalating verification costs, and increasing test cost. The semiconductor industry is therefore seeking innovations to reduce design cost, design cycle time, and the cost associated with presilicon and postsilicon qualification. Solutions to these problems req...

A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (TAM), the core test wrapper forms the test access infrastructure to embedded reusable cores. Various company-internal as well as industry-wide standardized but scalable wrappers have been proposed. This paper deals with...