Cryptographic cores are known to leak information about their private key due to runtime variations, and there are many well-known attacks that can exploit this timing channel. In this work, we study how information theoretic measures can quantify the amount of key leakage that can be exacted from runtime measurements. We develop and analyze twenty two RSA hardware designs – each with unique pe...

Timing analysis poses a significant threat to anonymity systems that wish to support low-latency applications like Web browsing, instant messaging, and Voice over IP (VoIP). Research into timing analysis so far has been done through simulations or unrealistic local area networks. We developed SubRosa, an experimental platform for studying timing analysis attacks and defenses in low-latency anon...

Well before large-scale quantum computers will be available, traditional cryptosystems must transitioned to post-quantum (PQ) secure schemes. The NIST PQC competition aims standardize suitable cryptographic Candidates are evaluated not only on their formal security strengths, but also judged based the with regard resistance against side-channel attacks. Although round 3 candidates have already ...

This paper proposes a hardware/software (HW/SW) co-design methodology for secure Public-Key Cryptosystems. Our design flow allows to assess the risk for simple side-channel attacks including Timing Analysis (TA) and Simple Power Analysis (SPA) at an early design stage. It also allows to evaluate the quality of countermeasures against these attacks. The HW/SW co-design is illustrated with an Ell...

—cryptographic devices have found their way into a wide range of application and the topic of their security has reached great research importance. It has been proved that encryption device leaks information, which can be exploited by various attacks such as power analysis, timing analysis and electromagnetic radiation. Differential power analysis is a powerful and efficient cryptanalytic techn...

SCADA protocols for Industrial Control Systems (ICS) are vulnerable to network attacks such as session hijacking. Hence, research focuses on network anomaly detection based on meta–data (message sizes, timing, command sequence), or on the state values of the physical process. In this work we present a class of semantic network-based attacks against SCADA systems that are undetectable by the abo...

This paper describes highly-optimized AES-{128, 192, 256}CTR assembly implementations for the popular ARM Cortex-M3 and M4 embedded microprocessors. These implementations are about twice as fast as existing implementations. Additionally, we provide the fastest bitsliced constant-time and masked implementations of AES-128-CTR to protect against timing attacks, power analysis and other (first-ord...

We report on what we believe to be the largest dataset (to date) of automated secure shell (SSH) bruteforce attacks. The dataset includes plaintext password guesses in addition to timing, source, and username details, which allows us to analyze attacker behaviour and dynamics (e.g., coordinated attacks and password dictionary sharing). Our methodology involves hosting six instrumented SSH serve...

Successful timing attacks against public-key cryptosystems have been demonstrated in many forms, suggesting the use of a technique known as blinding as countermeasure to these attacks. An alternative countermeasure has been considered, though somewhat overlooked and less studied in existing literature, consisting of idle-wait to make the decryption time independent of the data. In this work, we...

This contribution discusses cryptographic algorithm in hardware that protects the information leaks out of the device through so called „side channels“. Attacks on crypto-processors are based on analyses of the leaked data are known as sidechannel attacks (SCA). Important information, such as secret keys, can be obtained by observing the power consumption, the electromagnetic radiation, the tim...