Interpretation [CC77] is used to compute invariants about cache contents. How the behavior of programs on processor pipelines is predicted follows in Section 0.3. 0.2.1 Cache Memories A cache can be characterized by three major parameters: • capacity is the number of bytes it may contain. • line size (also called block size) is the number of contiguous bytes that are transferred from memory on ...

S treaming audio and video-on-demand technologies support a broad spectrum of multimedia information applications, including digital libraries, telemedicine, distance education, and military communications. These information systems allow real-time access and sharing of documents stored on distributed servers. Deploying proxy servers as part of the network infrastructure helps to meet the incre...

We propose the Cache Coherent B-tree (CCB-tree), an indexing structure that can improve search performance compared to the traditional B-tree. The CCB-tree makes use of the unused space in the internal nodes of a B-tree to cache frequently queried leaf node addresses, thus saving node accesses. An experimental study shows that the CCB-tree can outperform the traditional B-tree on workloads wher...

Multicomputer cache performance is highly sensitive to interprocessor message traac. The widening gap between microprocessor speeds and primary memory latencies means slight increases in cache miss rate can have a severe impact on application performance. It is therefore critical to reduce cache misses. While there are a number of factors that may contribute to an increase in cache misses, of p...

Internet server applications (such as web servers, ecommerce front-ends, etc) spend a significant portion of time processing network data. These applications use TCP/IP as the communication protocol which is known to be very memory intensive. In this paper, we present a simulation-based characterization of the cache/memory access behavior of TCP/IP processing in two popular commercial benchmark...

Asynchronous, cache coherence, shared-memory multiprocessor, SMP We propose and evaluate a cache-coherent symmetric multiprocessor system (SMP) based on asynchronous caches. In a system with asynchronous caches, processors and memory controllers may observe the same coherence request at different points in time. All protocol transactions are unidirectional and processors do not report snoop res...

In this paper, we address the problem of efficiently streaming a set of heterogeneous videos from a remote server through a proxy to multiple asynchronous clients so that they can experience playback with low startup delays. We develop a technique to analytically determine the optimal proxy prefix cache allocation to the videos that minimizes the aggregate network bandwidth cost. We integrate p...

We present an interactive player for free-viewpoint video. Free-viewpoint video data typically consist of large amounts of video datasets captured from multiple cameras and additional inter-view and frame information. Neither the size nor the representation of this data is appropriate for real-time rendering. Inspired by a new image interpolation approach based on correspondence fields, we prop...

We explore a video coding algorithm that uses long term memory in addition to motion compensated prediction to build a model from video frames for coding. The long term memory, modeled on the cache used in operating systems and searched by a vector quantization formalism, holds recurring visual elements such as cyclically revealed information and actors that persist though several images. This ...

The widespread use of the Internet has created two problems: document retrieval latency and network traac. Caching of documents \close" to users has helped to alleviate both problems. Diierent caching policies have been proposed/implemented to make best use of limited available cache at each caching server. A mesh of caching servers, aided by diierent data diiusion algorithms and the natural hi...