We construct an experimental model of a nonlinear dynamical system with three frequencies. With this analog electronic circuit made up of quasiperiodically forced coupled phase-locked loops, we investigate the structure of the scaling of three-frequency resonances or lockings in the dynamics. We hypothesize and confirm experimentally that for weak coupling the three-frequency resonance with the...

Analog circuit design is a challenging activity because the analog design procedure targets complex design specifications that are closely related to transistor sizing and device technology dependent. This paper addresses the design of CMOS Miller Operational Transconductance Amplifier (OTA) using a design methodology based on the gm/ID characteristic with some new features, including to the de...

A new CAD tool used for the interactive exploration of a design space has been developed. The interactive nature of the tool facilitates the acquisition of designer knowledge which may accelerate the development of improved circuit topologies in the future. The tool's cross-platform compatibility and network centric architecture prevents reinvention and facilitates organization-wide or worldwid...

In this paper a universal nth order current-mode filter employing electronically tunable second-generation current conveyors (ECCIIs) and grounded passive elements is proposed. Since the current gain of the ECCII can be controlled electronically by adjusting the ratio of DC bias currents, it is possible to tune all the coefficients of the transfer function independently through the variable cur...

Design techniques and CAD tools for digital systems are advancing rapidly at decreasing cost, while CMOS analog circuit design is related mostly with the individual experience and background of the designer. Therefore, the design of an analog circuit depends on several factors such as a reliable design methodology, good modeling and technology characterization. Most of this work focuses on the ...

A rapid yield estimation methodology that aids the analog circuit designer in making design trade-offs that improve yield is presented. This methodology is based on using hierarchical evaluation of analysis equations, rather than simulation, to predict circuit performance. The new analog rapid yield estimation (ARYE) method has been used to predict the yield of two-stage op amps, and has been i...

This paper describes how to specify and reason about the properties of non-ideal logical circuitry in the analogue domain. Device behaviours are characterised by predicates over the voltage and current waveforms present at their ports. In many cases it suuces to formulate these predicates simply in terms of linear inequalities. The behavioural predicate for an overall circuit is obtained by tak...

Neural networks are suitable to resolve problems where conventional resolution methods fail. The multipliers form a basic and important block in realising a neural network and this is commonly known as “Synapse”. Their roles are to multiply an input current with trained digital weights. Several research attempts to implement synapses. Some use numeric implementation whereas others use analogue ...

− This paper describes an analogue processing element (APE) suitable for high-density image sensor/processor array integrated circuits. The design tradeoffs between area, power consumption, speed and accuracy are discussed and the architecture of the APE is presented. The design follows a switched-current “analogue microprocessor” approach while the implementation of arithmetic operations is si...

A CMOS analogue circuit for Gaussian noise generution as well as a novel circuitfor transforming Gaussian noise into uniform noise, hoth.designed/or operating with a supply voltoge o/ I . S K arepresented. Both circuits are optimizedfor U 0 . 3 5 ~ standord CMOS technology using an equation-based design methodology based on generic algorithms. Electrical simulations demonstrate that high noise ...