TRIUMF’s Central Control System has a large investment in CAMAC. To protect this investment but allow the current trend of PCI-bus based computers to be supported, TRIUMF has configured a PCI to CAMAC system. In this setup, TRIUMF has connected PCI based computers into the CAMAC equipment of their Central Control System. DEC Alpha computers running OpenVMS have been interfaced via the PCI bus t...

Automotive body styling appraisement is very important for body styling design. Because there is not tangible standard at the structure ascertaining of artificial neural network(ANN) and improvement of stability is needed for ANN inside black box characteristic, a bus-styling appraisement method using extension theory-based artificial neural network is presented. The key techniques of quasi-thr...

IEC61850 communication standard for digital substation automation creates a new way to think about conventional protection scheme and configuration of substation. The presence of communication link in process bus makes a revolutionary change for future digital substation. This paper discusses briefly about process bus architecture and presents a new approach of thinking in busbar structure to m...

The Universal Serial Bus is a complex and, therefore, a popular bus on personal computers and other devices. Many devices including disks, keyboards, mice, and network cards are attached to computers using it. The bus is a tree with hubs as nodes and devices as leafs and uses pol­ ling from the root of the tree, which is the bus controller. It permits hot plugging and removal of devices at any ...

Permutation is a common problem in both computation and communication. We add the buses to the mesh-connected multiprocessors and introduce the tokens to control the buses. We propose to use the mesh with segmented reconngurable bus to increase performance of data routing. Segmented reconngurable bus can not only use the bus-token more eeciently than the traditional bus, but also reduce interco...

This paper presents a novel method of identifying the suitable location for Installation of Unified Power Flow Controller (UPFC), with static point of view, for reducing the severity of a load bus. Bus ranking Index which incorporates the combined effect of line outage contingency and bus load reaching to its voltage stability margin (VSM) is used for deriving the sensitivity factors. These sen...

Traffic congestion in Northern New Jersey imposes a substantial time operational penalty on bus service. The purpose of this project was to quantify the additional travel time that buses need due to traffic congestion. A regression model was developed that estimates the travel time rate (in minutes per mile) of a bus as a function of car traffic time rate, number of passengers boarding per mile...

Advanced microcontroller bus architecture (AMBA) is rapidly becoming the de facto standard for new system-on-chip (SoC) designs. The bus protocol is complex, making any peripherals that can interface to it valuable intellectual property (IP). This paper presents a lowpower bus encoding architecture which is able to deal with the complex advanced highperformance bus (AHB) protocol within AMBA, w...

The use of dedicated bus shoulders is a key method for implementing bus rapid transit (BRT) in areas that do not have the space for additional infrastructure. However, the narrow width of the bus shoulder and the need to anticipate traffic hazards in the adjacent lane can both be significant stressors for bus drivers. Bus driver mental workload and stress in response to these conditions should ...

NStrace is a bus-driven hardware trace facility developed for the PowerPC@ family of superscalar RlSC microprocessors. It uses a recording of activity on a target processor's bus to infer the sequence of instructions executed during that recording period. NStrace is distinguished from related approaches by its use of an architecture-level simulator to generate the instruction sequence from the ...