Embedded system architectures comprising of software programmable components (e.g. DSP, ASIP, and micro-controller cores) and customized hardware co-processors, integrated into a single cost-efficient VLSI chip, are emerging as a key solution to today's microelectronics design problems. This trend is being driven by new emerging applications in the areas of wireless communication, highspeed opt...

Electrical circuit simulation was one of the first CAD tools developed for IC design. The conventional circuit simulators like SPICE and ASTAP were designed initially for the cost effective analysis of circuits containing a few hundred transistors or less. A number of approaches have been used to improve the performances of congenital circuit simulators for the analysis of large circuits. There...

In this chapter we address performance-driven interconnect synthesis, which seeks to optimize circuit performance by minimizing signal delays to critical sinks. Timing-driven wiring geometries are in general quite different from optimal-area (i.e., Steiner) interconnect trees, especially as die sizes continue to grow while feature dimensions steadily shrink. The exposition below focuses on sele...

Binary Decision Diagrams (BDDs) are the state-of-the-art data structure in VLSI CAD. Since their size largely depends on the chosen variable ordering, dynamic variable reordering methods, like sifting, often have to be applied while the BDD for a given circuit is constructed. Usually sifting is called each time a given node limit is reached and it is therefore called frequently during the const...

Support for temporal data continues to be a requirement posed by many applications such as VLSI design and CAD, but also in conventional applications like banking and sales. The strong demand for complex-object support is known as an inherent fact in design applications, but it also holds for advanced “conventional” applications. Thus, new advanced database management systems should include bot...

In this paper, we explore automatic model construction by analyzing natural language documents. The extracted model will be utilized by a CAD system. A system called hmU, in the course of development, is designed to allow knowledge on very complex hardware module like LSI or VLSI to be incorporated into its knowledge base. The acquired knowledge will be utilized for helping human designer under...

This paper analyzes the patterns of the Monte Carlo data for a large number of variables and minterms, in order to characterize the circuit path length behavior. We propose models that are determined by training process of shortest path length derived from a wide range of binary decision diagram (BDD) simulations. The creation of the model was done use of feed forward neural network (NN) modeli...

-In this paper a 4 bit parallel adder/subtractor circuit has been designed and analyzed. The circuit uses a controlled adder/subtractor circuit which converts the negative numbers into their 2’s complement. A comparative study of the silicon area and the power consumption has been done in the circuit using different channel lengths such as 65nm, 45nm. The circuit is designed and simulated using...

Today’s VLSI technology allows us to construct large, complex systems with million transistors on a single chip. Most of the existing high level synthesis systems give more priority to optimization of area, power, resource and time steps compared to interconnection cost, whereas the later becomes predominant with the technology scaling and increase in complexity. Further, field programmable gat...

This paper describes how ’correct’ microcode can be produced through the use of mathematical logic and formal design methods. The use of these techniques to derive correct microcode for the IMS T800 floating point transputer from a mathematical specification is discussed. This experience on the IMS T800 has shown that this approach provides the opportunity to produce designs with a higher certa...