The exploration of the design space for heterogeneous reconfigurable Systems on Chip (SoC) becomes more and more important. As modern SoCs include a variety of different architecture blocks ensuring flexibility as well as highest performance, it is mandatory to prune the design space in an early stage of the design process in order to achieve short innovation cycles for new products. Therefore,...

The ongoing advances in semiconductor technology are the enabler for complete System on Chip (SoC) solutions. In this SoC domain Digital Signal Processors (DSPs) are employed to carry out software driven digital signal processing tasks. Although DSPs could still be modified in the SoC domain, they are mainly employed as fixed DSP cores. Possible adaptations to the embedding system cannot be car...

Digital Signal Processing (DSP) algorithms are usually designed and described on an abstract level and than transformed to a DSP chip specific C code by expert programmers. The problem is that the gap between the abstract description and the platform dependent code is huge and even the C code optimized for two different chips differ a lot. This makes it expensive to rewrite the algorithms each ...

This work describes a power-efficient bio-potential acquisition device for long-term healthcare applications that is implemented using novel microelectromechanical dry electrodes (MDE) and a low power bio-potential processing chip. Using micromachining technology, an attempt is also made to enhance the sensing reliability and stability by fabricating a diamond-shaped MDE (DS-MDE) that has a sat...

Convolution is one of the basic and most common operations in both analog and digital domain signal processing. Often times, it is desirable to modulate a given signal in order to enhance or extract important information contained in it. This signal modulation is generally known as filtering. In two-dimensional digital signal processing (2-D DSP), a 3 x 3 convolver is commonly used in applicati...

In this work the electronics for a highest resolution heterodyne interferometer is presented. It comprises an analog front-end, a high speed dual channel analog-to-digital converter and a field programmable gate array for high speed, low latency signal processing. The gate array contains a system on chip (formulated in a hardware description language), consisting of the main processing block (l...

Uniform nested loops are broadly used in scientific and multi-dimensional digital signal processing applications. Due to the amount of data handled by such applications, on-chip memory is required to improve the data access and overall system performance. In this study, a static data scheduling method, carrot-hole data scheduling, is proposed for multi-dimensional applications, in order to cont...

Spectrum analysis is very essential requirement in instrumentation and communication signal interception .Spectrum analysis is normally carried out by online or offline FFT processing. But the FFT being highly mathematical intensive, is not suitable for low area and low power applications. Offline FFT processing can’t give the real time spectrum estimation which is essential in communication si...

Word-parallel bit-serial processing is a solution to high speed processing suitable for VLSI. In this paper a new bitserial parallel processing architecture is proposed. A VLSI chip for a digital filter is designed based on the proposed architecture and it is implemented on a gate array chip. Through the implementation, it is verified that bit-serial parallel processing on an array architecture...

Optical Coherence Tomography (OCT) is a new medical imaging modality with resolution in the μm range and depth of imaging in the mm range. OCT is based on the principle of low coherence interferometry. This modality has been applied to imaging in various biological applications including ophthalmology, gastroenterology, dentistry, cardiology, tumor margining, etc. OCT systems are signal process...