Dynamic reconfiguration systems guided by coarsegrained program phases has found success in improving overall program performance and energy efficiency. These performance/energy savings are limited by the granularity that program phases are detected since phases that occur at a finer granularity goes undetected and reconfiguration opportunities are missed. In this study, we detect program phase...

Dynamic voltage and frequency scaling (DVS) for micro-processors seeks to minimize the energy consumption of the processor by scaling its voltage and frequency according to the workload. But, it has one major drawback – it accounts for only the energy consumption of the core processor, and not even of the other sub-systems on the chip, leave alone the peripherals attached to it. This makes it n...

Dynamic voltage scaling (DVS) has become a standard approach for reducing power when performance requirements vary. Voltage dithering was proposed to provide near-optimum DVS power savings with much less overhead [1]. Voltage dithering refers to operating for different fractions of time at two discrete voltage and frequency pairs to achieve an intermediate average frequency. Previous implementa...

Power has become the primary constraint in high performance computing. Traditionally, parallel job scheduling policies have been designed to improve certain job performance metrics when scheduling parallel workloads on a system with a given number of processors. The available number of processors is not anymore the only limitation in parallel job scheduling. The recent increase in processor pow...

<p class="Abstract">Modern BigData data-intensive and scientific workload execution is challenging. The major issues are reliable processing, performance efficiency energy efficacy perquisite of processing framework. This work assume self-aware MC architectures that autonomously adjust or optimize their to accommodate users quality service (QoS) requirement, job performance, efficiency, r...

In this work, we investigate the potential utility of parallelization for meeting real-time constraints and minimizing energy. We consider malleable Gang scheduling of implicitdeadline sporadic tasks upon multiprocessors. We first show the non-necessity of dynamic voltage/frequency regarding optimality of our scheduling problem. We adapt the canonical schedule for DVFS multiprocessor platforms ...

Two representative multimedia applications— AAC and H.264/AVC decoders on the parallel architecture core (PAC) SoC are introduced in the second part of the two introductory papers. The applications have been programmed on the PACDSP core and the PAC SoC to demonstrate the high-performance, low-power DSP computations and the effectiveness of the dynamic voltage and frequency scaling (DVFS) capab...

The workload offered to a typical server consists of many repeated tasks. We present and evaluate a feasibility study that shows how repetitive server workloads can be exploited to enhance the server and CPU energy savings realized by state-of-the-art linux power governors. To minimize dramatic modifications to the web server and the core kernel scheduler we exploit the forensic logging capabil...

A data center’s power and energy consumption is a crucial design issue, and is often a fundamental determiner of its performance potential. Conventional power/energy management approaches data centers have focused on uniprocessor rather than multiprocessor servers and on techniques such as Dynamic Voltage and Frequency Scaling (DVFS). Given the increasing use of chip multiprocessors (CMPs) and ...

In recent years, the issue of energy consumption in parallel and distributed computing systems has attracted a great deal of attention. In response to this, many energyaware scheduling algorithms have been developed primarily using the dynamic voltagefrequency scaling (DVFS) capability which has been incorporated into recent commodity processors. Majority of these algorithms involve two passe...