In contrast to conventional hardware where the structure is irreversibly fixed in the design process, evolvable hardware (EHW) is designed to adapt to changes in task requirements or changes in the environment, through its ability to reconfigure its own hardware structure dynamically and autonomously. This capacity for adaptation, achieved by employing efficient search algorithms based on the m...

An evolvable hardware (EHW) architecture for high-speed pattern recognition has been proposed. For a complex face image recognition task, the system demonstrates (in simulation) an accuracy of 96.25% which is better than previously proposed EHW architectures. In contrast to previous approaches, this architecture is designed for online evolution. Incremental evolution and high level modules have...

Microprocessors have long been the central controller for many autonomous robots. However, as a processor is a general-purpose device, it is possible that if a control system for a robot were designed specifically for a certain task, improved performance would result. However, such an approach would be impractical for anything but the most simplistic goals, assuming that a human were the design...

Traditional approaches to evolvable hardware (EHW), in which the field programmable gate array (FPGA) configuration is directly encoded, have not scaled well with increasing circuit and FPGA complexity. To overcome this there have been moves towards encoding a growth process, known as morphogenesis. Using a morphogenetic approach, has shown success in scaling gate-level EHW for a signal routing...

Meeting the high demands of outer space missions requires immense efforts and is exceedingly time consuming. For the latest accomplished missions, the engineering of the hardware and computing systems took years and must be completed before launch. The architecture of a Network on Chip (NoC) based System on Chip (SoCs) is presented in this paper. These SoCs capable of partial reconfiguration at...

In the past, we have extrinsically evolved continuous time recurrent neural networks (CTRNNs) to control physical processes. Currently, we are seeking to create intrinsic CTRNN devices that combine a hardware genetic algorithm engine on the same chip with reconfigurable analog VLSI neurons. A necessary step in this process is to identify a genetic algorithm that is both amenable to hardware imp...

Evolvable Hardware (EHW) has been proposed as a new method for designing electronic circuits. In this paper it is applied for evolving a prosthetic hand controller. The novel controller architecture is based on digital logic gates. A set of new methods to incrementally evolve the system is described. This includes several different variants of the fitness function being used. By applying the pr...

This paper proposes a dynamic power management algorithm based on an evolutionary algorithm for minimisation of power on a system on chip (SoC) evolvable hardware (EHW) systems. The algorithm is specially designed to operate within an embedded microcontroller processor such as the ARM. The paper describes the algorithm, its implementation on an ARM based embedded processor and provides results ...

Evolutionary computation is a rapidly expanding field of research with a long history. Much of that history remains unknown to most practitioners and researchers. This paper offers a review of selected foundational efforts in evolutionary computation. A brief initial overview of the essential components of evolutionary algorithms is presented, followed by a review of early research in artificia...