A power divider with ultra-wideband (UWB) performance has been designed. The quarter-wave transformer in the conventional Wilkinson power divider is replaced by an exponentially tapered microstrip line. Since the tapered line provides a consistent impedance transformation across all frequencies, very low amplitude ripple of 0.2 dB peak-to-peak in the transmission coefficient and superior input ...

Ultra wideband components have been developed using SIW technology. The various newly developed components include a GCPW transition, Y and T-junctions. The GCPW transition covers over 10GHz bandwidth with less than 0.4 dB insertion loss. The optimized T and Y-junctions have relatively wide bandwidths of greater than 40% that have less than 0.6 dB insertion loss. The developed transition was ut...

This paper presents a low VSWR high gain telemetry antenna system manufactured for UAVs that provides 360◦ coverage in the roll plane of the UAV. Proposed telemetry antenna system includes four telemetry antennas, one power divider that has one input and four output terminals which feeds the telemetry antennas with equal magnitude and phase. Proposed high gain telemetry antennas are based on th...

An 8-bit programmable square finder cum frequency divider architecture is presented. This special architecture includes a high speed parallel counter, clock trigger circuit, eight bit multiplier logic, sequence termination logic and sequence restarter logic. The entire architecture is divided into two parts: The frequency divider section and the square finder section. The frequency divider circ...

This work proposes an integrated high frequency divider with an inductive peaking technique implemented in a current mode logic (CML) frequency divider. The proposed divider is composed with a master-slave flip-flop, and the master-slave flip-flop acts as a latch and read circuits which have the differential pair and cross-coupled n-MOSFETs. The cascode bias is applied in an inductive peaking c...

A novel coupled-line structure is proposed to design dual-band and high-power Gysel power dividers with inherent impedance-transforming functions. Based on traditional even- and odd-mode technique, the analytical design methods in closed-form formula are obtained and the accurate electrical parameters analysis is presented. Due to the usage of coupled-line sections, more design-parameter freedo...

A 0.8-V CMOS Phase-Locked Loop (PLL) has been designed and fabricated by using a 0.13-μm 1p8m CMOS process. In the proposed PLL, the double-positive-feedbacks voltage-controlled oscillator (DPF-VCO) is used to generate current signals for the coupling current-mode injection-locked frequency divider (CCMILFD) and currentinjection current-mode logic (CICML) divider. A short-pulsed-reset phase fre...

Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design base...

Multiplier and divider circuits are usually required in the fields of analog signal processing and parallel-computing neural or fuzzy systems. In particular, this paper focuses on the hardware implementation of fuzzy controllers, where the divider circuit is usually the bottleneck. Multiplier/ divider circuits can be implemented with a combination of A/D-D/A converters. An efficient design base...