Using a vision-based solution in intelligent vehicle application often requires large amounts of memory to handle the video stream and image process, which increases the complexity of the hardware and software. In this paper, we present a Field-programmable Gate Array (FPGA) implementation of a vision-based lane departure warning system. By taking video frames, the line gradient is estimated an...

We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [BRV89]. Based on Field Programmable Gate Array (FPGA) technology, the PAM is a universal hardware co-processor closely coupled to a standard host computer. The PAM can speed up many critical software applications running on the host, by executing part of the com...

In this paper we present a digital generator which produces sine-wave signals with variable frequency. The shape of the signal is stored in memory. The modification of the frequency is achieved by changing the number of samples used to generate a period. The digital circuitry of the generator is implemented using a field programmable gate array (FPGA) and a microcontroller. Experimentally we ha...

It is planned that the TIGER N.Z. radar will be a digital evolution of the current analog system, where the phasing matrix for both transmitter and receiver arrays, and the receiver architecture will be implemented in Field Programmable Gate Array (FPGA) technology. Producing a fully digital system in FPGA technology allows a different solution to the current analog approach. An added challenge...

The paper presents a case study of introducing field programmable gate array (FPGA) based implementation of controllers in LabVIEW environment in a graduate Mechatronics course. The process of system identification, controller design and its implementation is illustrated using a physical system in the laboratory setting. The students’ survey response on the introduction of FPGA based controller...

The paper proposes a new fast Fourier transform (FFT) protection algorithm for digital relaying based on field-programmable gate array (FPGA), constructs detailed models and performs corresponding simulations. Simulation results show that the harmonic components of voltages and currents can be conveniently calculated, and the digital protection functions can be effectively fulfilled with enhanc...

A configurable chip for binary morpholpgical and temolate m a t c h o~erations is presented here. The chip was designed based on FPGA design methodologies and fabricated in 0.8 ,um CMOS Gate Array technology. The TMPSXSTIM is able to process maximum 1024x1024 pixels binary image with 5x5 template size in a speed of 200 ns per pixel at I0 MHz clock rates. Two or more processors can be configured...

1. Abstract This paper presents a reconfigurable platform as a tool for a virtual worldwide laboratory. The platform has been developed for teaching and research purposes. It is a practical approach to the Internet reconfigurable logic and it allows the rapid prototyping and test of digital systems. 2. Introduction Reconfigurable hardware first became practical with the introduction a few years...

Modern advancements in configurable hardware, most notably Field-Programmable Gate Arrays (FPGAs) have provided an exciting opportunity to discover the parallel nature of modern image processing algorithms. These configurable platforms provide the opportunity to implement parallel architecture to boost the performance of the inherently parallel image processing algorithms. This survey paper giv...

In this report we describe an adaptation of the Hough transform for the tracking of particles in the CBM STS detector, together with a possible implementation of the algorithm in hardware using FPGA (field programmable gate array) as a level-1 trigger. A first FPGA based R&D hardware prototype that can be used also for a variety of other application (e.g. Data Combiner and Active Buffer) is als...