Titanium dioxide has been deposited on silicon for use as a high-permittivity gate insulator in an effort to produce low-leakage films with oxide equivalent thicknesses below 2.0 nm. Excellent electrical characteristics can be achieved, but TEM and electrical measurements have shown the presence of a low-resistivity interfacial layer that we take to be SiO2. The leakage current follows several ...

The scaling of silicon-based MOSFET technology beyond the 22 nm node is challenging. Further progress requires new materials, innovative structures, and even novel device concepts. All the emergent channel materials need perfect top-gate dielectric stacks in order to sustain their potential device performance. ALD high-k as a common gate stack solution finds itself very successfully integrated ...

We study gate-controlled, low-temperature resistance and magnetotransport in indium-doped CdSe quantum dot field effect transistors. We show that using the gate to accumulate electrons in the quantum dot channel increases the "localization product" (localization length times dielectric constant) describing transport at the Fermi level, as expected for Fermi level changes near a mobility edge. O...

The effects of dielectric-annealing gas (O2, N2 and NH3) on the electrical characteristics of amorphous InGaZnO thin-film transistor with HfLaO gate dielectric are studied in-depth, and improvements in device performance by the dielectric annealing are observed for each gas. Among the samples, the N2-annealed sample has a high saturation carrier mobility of 35.1 cm 2 /V∙s, the lowest subthresho...

A hetero gate dielectric low band gap material DG Tunnel FET is presented here. The investigated device is almost free from short channel effects like DIBL and t V rolloff. Simulation of the device characteristics shows significant improvement over conventional double gate TFET when compared interms of on current, ambipolar current, roll-off, miller capacitance and, device delay time. Simulatio...

The performance of carbon nanotube-based transistor is analyzed. The effect of geometrical parameters on the device performance is investigated as d tunnel. We have studied the influence of the material parameters, such as the height of the SB (ΦSB), and some other physical parameters like the nanotube chirality, the gate oxide thickness and the gate oxide dielectric permittivity Our results sh...

This work presents a comparative analysis of top gate a-IGZO TFTs fabricated on both soda-lime-silica glass and alkali-free borosilicate glass. Low-temperature ALD is selected for the deposition of gate dielectric to minimize a thermal stress. Comparing with TFTs on alkali-free borosilicate glass, TFTs with soda-lime-glass show similar threshold voltage and subthreshold swing, but slightly degr...