The current practice of specifying simultaneous gap out logic at isolated high speed signalized intersections places constraints on the signal controller logic that cannot be satisfied under high congestion level. Further, it often results in degraded signal efficiency and dilemma zone protection. A stochastic approach is proposed in this paper with the objective of increasing safety and effici...

Memristive technologies are attractive candidates to replace conventional memory technologies, and can also be used to perform logic and arithmetic operations using a technique called 'stateful logic.' Combining data storage and computation in the memory array enables a novel non-von Neumann architecture, where both the operations are performed within a Memory Processing Unit (MPU). The use of ...

Third generation cellular network technology (3G) can revolutionize communications and data exchanges between many people in a more overwhelming fashion than 2G and 2.5G networks did. The 3G UMTS, the 3G GSM and the 3G GPRS rely on the KASUMI block cipher. Therefore, increasing speed, decreasing power consumption and error detection/correction are the major concerns of the KASUMI algorithm and ...

We present algorithms for performing the five elementary arithmetic operations ( $+$ , notation="LaTeX">$-$ ×, notation="LaTeX">$\div$ and notation="LaTeX">$\sqrt{\phantom{x}}$ ) in floating point with stochastic rounding, demonstrate value o...

Given the popularity of decimal arithmetic, hardware implementation of decimal operations has been a hot topic of research in recent decades. Besides the four basic operations, the square root can be implemented as an instruction directly in the hardware, which improves the performance of the decimal floating-point unit in the processors. Hardware implementation of decimal square rooters is usu...

In exploiting the potentials of highly parallel architectures to speed up the computation rate of systems enabled by VLSI, special attention has to be paid to designing algorithms such that they can be mapped onto parallel hardware. The main part of the Viterbi algorithm (VA) is a nonlinear feedback loop, the ACS recursion (add-compare-select recursion), which presents a bottleneck for high-spe...

Artificial neural networks (ANNs, or simply NNs) are inspired by biological nervous systems and consist of simple processing units (artificial neurons) that are interconnected by weighted connections. Neural networks can be ”trained” to solve problems that are difficult to solve by conventional computer algorithms. This paper presents the development and implementation of a generalized back-pro...

An efficient architecture of 1D CSDA MST core is designed using CSDA (Common Sharing Distributed Arithmetic) to achieve highthroughput rate supporting multistandard transformations at low cost. Common sharing distributed arithmetic (CSDA) combines factor sharing and distributed arithmetic sharing techniques, efficiently reducing the number of adders for high hardware-sharing capability. Convent...

A numerical set-expression is a term specifying a cascade of arithmetic and logical operations to be performed on sets of non-negative integers. If these operations are confined to the usual Boolean operations together with the result of lifting addition to the level of sets, we speak of additive circuits. If they are confined to the usual Boolean operations together with the result of lifting ...

-For the rapid development high-speed railway system, improvement approach of the velocity measurement accuracy has been studied based on multiple speed sensors on high-speed train. In this method, the velocity measurement data from multi-channel speed sensors were dealt through data fusion of arithmetic mean filter, weighted arithmetic mean filter, Federated Kalman filter and adaptive Federate...