Exploring passengers’ consumption motivation can provide the basis for arranging commercial activities in high-speed rail (HSR) stations to generate more revenue operations. This study uses a mixed multiple-attribute decision-making model exploring at HSR and complex influential relationships from perspective. The passenger traffic five major Taiwan were evaluated. Based on results of trial eva...

This paper presents the design and analysis of high speed, high gain and fully differential operational transconductance amplifier (OTA) implemented in 65-nm digital CMOS process. The OTA, which employ a folded-cascode topology with gain boosting technique, has rail-to-rail input swing and large output swing. The result shows the DC gain of 82 dB and a unity-gain frequency of 477MHz with phase ...

The distribution coefficient of return current network is an important method to decrease the rail potential. In order to resolve the problem of high rail potential in high-speed railway based on EN50122-1 and Pr EN50170 the distribution coefficient of longitudinal traction return current conductors is calculated through changing the interval of transverse connection. Based on field data and th...

In this paper, novel ultra low voltage (ULV) dual-rail NOR gates are presented which use the semi-floating-gate (SFG) structure to speed up the logic circuit. Higher speed in the lower supply voltages and robustness against the input signal delay variations are the main advantages of the proposed gates in comparison to the previously reported domino dual-rail NOR gates. The simulation results i...

A new fast handover algorithm for LTE high-speed rail networks is proposed in this paper. In railway environment, the motion direction and the GPS information of the train can be obtained at any time. Moreover, the neighbor cell that the UE will go through can be precognitive. The above information are utilized to bring forward a fast handover scheme in this paper, which can give a set of alter...

Abstract MOS Current-Mode Logic (MCML) is usually used for high-speed applications. However, almost all MCML circuits are realized with dual-rail scheme. The dual-rail logic circuits increase extra area overhead and the complexity of the layout place and route. Moreover, little standard cells of the dualrail logic circuits have been developed for place-and-route tools, such as Cadence Encounter...