A NAND flash memory senses a cell current in the range of tens nA, which is smaller than other nonvolatile memories read operation. Because small current, it difficult to improve latency and accuracy The improvement has been major challenge for all-bit-line (ABL) sensing architecture because BL coupling capacitance caused by off limits pre-charge time. In this paper, high-speed scheme with an o...

This paper will describe a fault simulation tool for analogue and mixed-signal circuits based on the HSpice circuit simulator and a graphical user interface (GUI)/Integration tool created using Tcl/Tk. The structure and use of the tool is demonstrated with example to the fault-free and fault simulation of a weighted-current Digital to Analogue Converter (DAC). Fault simulation techniques utilis...

Resistive RAMs (ReRAMs), where the resistance is changed by voltage and current biases, have extensively been studied to develop high-speed and large-capacity nonvolatile memories as well as functional nonvolatile memories. ReRAMs are so far intended for use as alternatives to contemporary flash memories, but the applications are not limited to Boolean alternatives. Although physical mechanisms...

Abstract  In his paper a new current-controlled conveyor (CCCII) in CMOS technology is presented. It features, low supply voltage (±0.7), low power consumption, low circuit complexity, rail to rail operation and wide range parasitic resistance ( ). The circuit has been successfully employed in a multifunction biquad filter. Simulation results by HSPICE show high performance of the circuit and c...

The paper introduces a set of models memristive devices for reliable, accurate and fast analysis large networks in the SPICE (Simulation Program with Integrated Circuit Emphasis) environment. modeling starts from recently introduced TEAM (ThrEshold Adaptive Memristor Model) VTEAM (Voltage ThrEshold Model). A number improvements are made towards stick effect elimination other numerical refinemen...

The paper presents the implementation of a standard cell multigate fully synthesizable rail-to-rail dynamic voltage comparator. comparator works on deep sub-threshold supply VDD =0.3 V with common mode inputs. common-mode input range is VDD/2 minimum offset ranging between 8mV to 28mV. Thus circuit simulated at 180nm Complementary Metal-Oxide Semiconductor (CMOS) process. Hence has measured and...

Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce low-power nano-scale embedded and Internet Thing (IoT) devices to save their battery consumption. The 32 nm CNTFET-based half adder (THA) multiplier (TMUL) use novel unary operator implement two power ...

a log-domain current-mode true rms-to-dc converter based on a novel synthesis of a simplified current-mode low pass filter and a two-quadrant squarer/divider is presented. the circuit employs floating gate mos (fg-mos) transistors operating in weak inversion region. the converter features low power(<1.5uw), low supply voltage (0.9v), two quadrant input current, immunity from body effect, low ci...

When the input signal has been interfered and glitches occur, power consumption of Double-Edge Triggered Flip-Flops (DETFFs) will significantly increase. To effectively reduce consumption, this paper presents an anti-interference low-power DETFF based on C-elements. The improved C-element is used in DETFF, which blocks signal, prevents redundant transitions inside reduces charge discharge frequ...