In this paper, a new domino circuit is proposed with low leakage current and high noise immunity which decreases the parasitic capacitance on the dynamic node. This yields a smaller keeper transistors for wide fan-in gates to implement fast and robust circuits. The technique utilized is based on comparison of mirrored current of the pull-up network with its worst case leakage current. Thus, the...

The present <span lang="EN-US">study is focussed on a comparative analysis of different meta-heuristic optimization approaches for directional overcurrent relay (DOCRs) coordination which has been discussed and presented in the literature. Further, to have performance methods they tested power system network sizes. To overcome such issues, this work proposed simplex linear programming tec...

Multilevel inverters are a source of high power, often used in medium-voltage application. Multilevel converters have received increased interest recently due to high quality output waveform and decrease the harmonic distortion in the output waveform without decreasing the inverter power output. A multilevel inverter uses a series of semiconductor power converters, thus generating higher voltag...

Pre-breakdown (leakage) and breakdown currents and photon-emission associated with the currents, under impulse (0.36!10 IJ-S) voltage stress, along high purity (p>30 KQ em) silicon, with and without gold end contacts in vacuum (-lQ-6 Torr), are discussed. Three distinct phases leading to the breakdown condition are observed. These are one-carrier (hole) leakage current, two-carrier (electrons a...

The proliferation of compensators, due to their nonlinear characteristics raises concern over the distortion levels they cause in voltages and currents at the transmission level. In this paper, series compensation by Thyristor Controlled Series Capacitor (TCSC) and shunt compensation by STATCOM are investigated in terms of power quality and their effects on protective relays behavior. For each ...

An ultra-low-leakage power-rail ESD clamp circuit, composed of the SCR device and new ESD detection circuit, has been proposed with consideration of gate current to reduce the standby leakage current. By controlling the gate current of the devices in the ESD detection circuit under a specified bias condition, the whole power-rail ESD clamp circuit can achieve an ultra-low standby leakage curren...

In this paper, gate leakage current has been mitigated by the use of novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high-k spacer structure for the first time. A compact analytical model has been developed to study the gate leakage behaviour of proposed MOSFET structure. The result obtained has found good agreement with the Sentaurus Simulation. Fringing gate electric field...