A two stage sub-µW Inverter-based switched-capacitor amplifier-filter is presented which is capable of amplifying both spikes and local field potentials (LFP) signals. Here we employ a switched capacitor technique for frequency tuning and reducing of 1/f noise of two stages. The reduction of power consumption is very necessary for neural recording devices however, in switched capacitor (SC) cir...

The geographical routing for IEEE 802.15.4a standard is targeted towards providing an infrastructure for ultra-low complexity, ultra-low cost, ultra-low power consumption, and low data rate wireless connectivity among inexpensive devices. Existing interference aware graphical routing methods have shown to reduce energy consumption with increase in data delivery ratio. This paper presents a modi...

Due to limited resources, power consumption is a crucial characteristic of sensor node hardware and applications. Although many researchers contributed low power and energy aware applications, power consumption is still a limiting factor. As discovered by recent deployments, the sensor node lifetime is very often significantly shorter than expected. We present a model, which enables highly accu...

Adiabatic logic is used to minimize the energy loss during operation of the circuit. Using two-phase adiabatic static CMOS logic (2PASCL) the power consumption can be reduced. This paper compares the power consumption of Static Energy Recovery Full Adder(SERF) and the proposed full adder using two phase adiabatic static CMOS logic(2PASCL). The average power consumption of proposed full adder is...

Low power SRAM memory designs has become challenging for portable device applications. Semiconductor/ VLSI industry growth has exponentially demanding low leakage power SRAM designs for high performance chips and microprocessors. To get optimized standard cell memory design for battery operated devices at deep sub micron CMOS technology, a low leakage Asynchronous 8T SRAM is proposed. In this p...

In this paper a dual voltage CMOS low power output pad is presented. The pads are the interface circuits between the core and the package pins of any integrated circuit. The power consumption of these pads it is a very important parameter for the global power consumption of the integrated circuit that includes them. The proposed pad includes a pre-driver and a final output stage including ESD(e...

The management of power consumption for battery life is widely considered to be the limiting factor in supporting the concurrent operation of high performance, complex applications on mobile platforms. At 65nm and below, minimizing the static power dissipation through aggressive techniques such as coarse grain MTCMOS power gating and threshold voltage scaling can yield these significant reducti...

a complete procedure for the design of w-band low noise amplifier in mmic technology is presented. the design is based on a simultaneously power and noise matched technique. for implementing the method, scalable bilateral transistor model parameters should be first extracted. the model is also used for transmission line utilized in the amplifier circuit. in the presented method, input/output ma...

− A stepwise driving method was used for reducing the AC power consumption in a TFT-LCD. The AC power takes the largest portion of the total power consumption of a TFT-LCD. Experimental results confirmed that the AC power saving efficiency reached up to 75% when a 5-stepwise driving with each step time of 2μ sec was applied to a 14.1 inchdiagonal XGA TFT-LCD. The second largest component of pow...

The successful realization of a Wireless Body Area Network (WBAN) requires innovative solutions to meet the energy consumption budget of the autonomous sensor nodes. The radio interface is a major challenge, since its power consumption must be reduced below 100μW (energy scavenging limit). The emerging Ultra-WideBand (UWB) technology shows strong advantages in reaching this target. First, most ...