In this paper, we develop asymptotic analysis models for better understanding the performance and energy consumption characteristics of multi-core processor architectures using Amdahl’s law in order to foresee their performance and energy impacts for given workload characteristics (e.g. available parallelism). Through the asymptotic analysis and optimization based on the models proposed in this...

In the software development for vehicular embedded systems, timing predictability is paramount for the development of the vehicles’ safety features and for their customer value. Modern vehicles’ features require new level of computational power. On the one hand, multicore platforms can provide efficient support for these features. On the other hand, multi-core platforms complicate the software ...

An MPEG-2 audio decoding processor core is described with a focus on inverse quantization (IQ) and multichannel processing (MC) of Layer I and II decoding. A novel architecture that we propose can perform IQ at a high throughput. In addition, different types of dematrixing modes for MC process in the MPEG-2 standard can also be performed. The processor core is implemented and controlled with a ...

The advent of multi-core architecture has highly influenced the area of high performance computing. Parallel compilation is the area which still needs significant improvement by the use of this architecture. Recent research has shown some improvement in lexical analysis phase. But it is difficult to implement the same technique in parsing phase. This paper highlights some issues related to impl...

This paper proposes a heterogeneous multi-core architecture where all of the cores share a single Instruction Set Architecture (ISA). The design is characterized by each of the heterogeneous cores representing a different point in the power/performance design space. They demonstrate, through modeling, that this is an effective mechanism to reduce power dissipation by means of dynamically switch...

This paper first investigates what the best multicore configuration will be in the future, when the number of usable transistors further increases. Comparing five multicore models: single-core, many-core, heterogeneous multicore, scalable homogeneous multicore, and dynamically configurable multicore, surprisingly unveils that single-core performance is a key to improve multicore performance. Ba...

We have benchmarked dual-processor quad-core AMD Opteron 2350 and 2356, dual-processor quad-core Intel Xeon E5345, single processor quad-core Intel Xeon X5472, dual-processor dual-core AMD Opteron 2214, dual-processor single-core Intel Xeon EM64T and single-processor single-core Intel Xeon EM64T systems using a CMSSW event simulation and reconstruction application. The results are presented in ...

Multi-core clusters have emerged as an important contribution in computing technology for provisioning additional processing power in high performance computing and communications. Multi-core architectures are proposed for their capability to provide higher performance without increasing heat and power usage, which is the main concern in a single-core processor. This paper introduces analytical...

DRAM-based memory is a critical factor that creates a bottleneck on the system performance since the processor speed largely outperforms the DRAM latency. In this thesis, we develop a low-cost mechanism, called ChargeCache, which enables faster access to recently-accessed rows in DRAM, with no modifications to DRAM chips. Our mechanism is based on the key observation that a recently-accessed ro...