We propose a classification of high and low-level compiler optimizations to reduce the clock period, power consumption and area requirements in Field-programmable Gate Array (FPGA) architectures. The potential of each optimization, its effect on clock period, power and area and machine dependency is explained in detail.

R untime reconfigurable systems built upon devices with partial reconfiguration can provide reduction in overall hardware area, power efficiency, and economic cost in addition to the performance improvements due to better customization. However, the users of such systems have to be able to afford some additional costs compared to hardwired application specific circuits. More precisely reconfigu...

objective: the main objective pursued in this paper is to investigate the energy consumption for drying of potato slices using vacuum-infrared drying method. methods: drying of potato slices with the thicknesses of 1, 2 and 3 mm were conducted at vacuum levels of zero (without vacuum), 20, 80 and 140 mm [hg], infrared radiation at power levels of 100, 150 and 200 w in the three repetition. resu...

One of the major challenges in Wireless Body Area Networks (WBANs) is to prolong the lifetime of network. Traditional research work focuses on minimizing transmit power; however, in the case of short range communication the consumption power in decoding is significantly larger than transmit power. This paper investigates the minimization of total power consumption by reducing the decoding power...

Quantum-dot cellular automaton (QCA) is a novel nanotechnology with a very different computational method in compared with CMOS, whereas placement of electrons in cells indicates digital information. This nanotechnology with specifications such as fast speed, high parallel processing, small area, low power consumption and higher switching frequency becomes a promising candidate for CMOS tec...

The need for ultra low-power, area efficient and high speed analog-to-digital converters is pushing toward the use of dynamic regenerative comparators to maximize speed and power efficiency. The objective of this paper is to design and implementation of delay efficient and low power consumption double-tail dynamic comparator in successive approximation analog to digital convertor. The conventio...

Objective: The main objective pursued in this paper is to investigate the energy consumption for drying of potato slices using vacuum-infrared drying method. Methods: Drying of potato slices with the thicknesses of 1, 2 and 3 mm were conducted at vacuum levels of zero (without vacuum), 20, 80 and 140 mm [Hg], infrared radiation at power levels of 100, 150 and 200 W in the three repetition. Resu...

Objective: The main objective pursued in this paper is to investigate the energy consumption for drying of potato slices using vacuum-infrared drying method. Methods: Drying of potato slices with the thicknesses of 1, 2 and 3 mm were conducted at vacuum levels of zero (without vacuum), 20, 80 and 140 mm [Hg], infrared radiation at power levels of 100, 150 and 200 W in the three repetition. Resu...