This paper presents a new approach to reversible cascade evolution based on a 3D cellular automaton. As a research platform we used the ATR’s CAMBrain Machine (CBM). Reversible circuits are investigated because they are expected to dissipate much less energy than their irreversible counterparts. One day they will be implemented as nano-scale 3-dimensional chips. A circuit is reversible if the n...

The Fredkin gate (Fredkin & Toffoli, 1982) is a Boolean logic gate that consists of 3 inputs and 3 outputs. This gate is universal for computational logic, and more importantly, it is reversible in the sense that the mapping between its inputs and outputs is bijective. In this paper, we realize the logic function of a Fredkin gate based upon two simple reversible elements (Lee, et al. 2008) tha...

| An 8 x 8-b nRERL serial multiplier is implemented in a 0.6m n-well 3-metal CMOS process. nRERL (nMOS Reversible Energy Recovery Logic) is a new reversible adiabatic logic circuit, which can be operated at the leakage-current level for ultralow-energy applications. Measurement results showed that the nRERL serial multiplier consumed only 0.9 % of the energy dissipation of the static CMOS one a...

Reversible logic circuits have the ability to produce zero power dissipation which has found its importance in quantum computing, optical computing and low power digital circuits. The study presents improved and efficient reversible logic circuits for carry skip adder and carry skip BCD adder. The performance of the proposed architecture is better than the existing works in terms of gate count,...

This study is about the design and analysis of a reversible logic based multiplexer, that is realized using carbon nano tube transistor. Reversible logic realization of the digital circuits offers numerous advantages over conventional circuit design. Power analysis was performed using HSPICE simulation software and the results are obtained for the 2×1 and 4×1 multiplexer transient behavior. The...

Today’s computers are based on irreversible logic devices, which have been known to be fundamentally energy-inefficient for several decades. Recently, alternative reversible logic technologies have improved rapidly, and are now becoming practical. In traditional models of computation, pure reversibility seems to decrease overall computational efficiency; I provide a proof to this effect. Howeve...

Abstract: Reversible logic is very essential for the construction of low power, low loss computational structures which are very essential for the construction of arithmetic circuits used in quantum computation, nano technology and other low power digital circuits. In the present paper an optimized and low quantum cost one digit BCD adder and an optimized one digit carry skip BCD adder using ne...

The IEEE 754 single precision floating point multiplier uses reversible exponent adder to accomplish multiplication operation. The REA is designed and implemented using reversible logic gates like Peres gate and TR gate. Reversible logic is used to reduce the power dissipation compared to classical logic and it can also reduces the information loss so which finds application in different fields...

Field programmable gate arrays (FPGA) are increasingly being used in the high performance and scientific computing community to implement floating-point based system. The reversible single precision floating point multiplier (RSPFPM) requires the design of reversible integer multiplier (2424) based on operand decomposition approach. Reversible logic is used to reduce the power dissipation than...

Testing of Sequential circuits can be done by two test vectors (all 1’s and all 0’s) if the circuits were based on the conservative logic. The circuit is made to be tested by designing the circuit with the help of Reversible logic gates. Toffoli gate is used as reversible gate in this paper. Sequential circuits such as latches, flip flops are designed with the help of conservative logic reversi...