The design of Continuous-Time (CT) Sigma-Delta modulator obtained by a discrete-time prototype is discussed. A proper heuristic transformation of the prototype enables an exact equivalence of CT and DT. This permits the trimming by computer simulations of the coefficients of the CT to account for the effect of real analog blocks. Simulation results for a second and third order scheme with real ...

In a digital class D power amplifier, the distortion is introduced into the input signal being amplified in power stage, due to the effect of power supply noise. A method used to eliminate the distortion is presented in the paper. This method is adding correction factors to all integrators of Delta-Sigma modulator, and introducing power supply noise to the input of the class D power amplifier a...

The paper proposes a novel structure for a MASH digital delta-sigma modulator (DDSM) in order to achieve a long sequence length. The expression for the sequence length is derived. The condition to produce the maximum sequence length is also stated. It is proved that the modulator output only depends on the structure of the first-order error feedback modulator (EFM1) which is the first stage of ...

The transition from the system level to the transistor level design of sigma delta modulator involves degradation in performance due to circuit imperfections, the extent of which depends on the architecture. A systematic understanding of the sensitivity is essential to accomplish a robust design. Smart behavioral modeling allows us to compare architectures and to derive minimum specifications f...

This paper discusses important elements of the Pockels sensing cell design. A novel electrode geometry is analyzed in order to obtain maximum sensitivity response from Pockels crystals (Bi(12)GeO(20)). This neither transversal nor truly longitudinal geometry, results in electrical field distribution along the sensing beam path that provides high modulation depth. Demonstrated performance level ...

An integrated tool called DAISY (Delta–Sigma Analysis and Synthesis) is presented for the high–level synthesis of 16 modulators. The approach determines both the optimum modulator topology and the required building block specifications, such that the system specifications – mainly accuracy and signal bandwidth – are satisfied at the lowest possible power consumption. A genetic–based differentia...

This paper describes the design and implementation of a low power reconfigurable sigma-delta modulator for multi-standard wireless applications in a 90-nm CMOS technology. Both architectural and circuital reconfigurations are used to adapt the performance of the modulator to five different communication standards. The feasibility of the proposed solution is shown using the system-level simulati...

Digital delta-sigma modulators (DDSMs) applied in fractional-N frequency synthesizers suffer from spurious tones which undermine the synthesizer’s spectral purity. We propose a solution featuring no hardware overhead while achieving equivalent spur elimination effect as using LFSR-dithering. This method can be implemented on MASH and single-loop DDSMs of 3rdand 2nd-order. key words: Digital del...

This paper introduces the concept of frequency-translating, bandpass delta-sigma modulator in continuous-time. The system level design and simulation results of the deltasigma modulator are presented. The DAC jitter performance of the continuous-time, frequency translating bandpass delta-sigma modulator is presented. The DAC jitter performance of the frequency translating modulator and conventi...