In this paper, we propose a new time-shared twin memristor crossbar for pattern-recognition applications. By sharing two memristor arrays at different time, the number of memristor arrays can be reduced by half, saving the crossbar area by half, too. To implement the time-shared twin memristor crossbar, we also propose CMOS time-shared subtractor circuit, in this paper. The operation of the tim...

Abstract: In this paper, we aim to design and propose a novel structure for all-opticalhalf subtractor based on the photonic crystal. The structure includes two optical switches,one power splitter, and one power combiner. The optical switches are made of theresonant rings which use the nonlinear rods for dropping operation. The footprint of thedesigned structure is about...

Application of quantum-dot is a promising technology for implementing digital systems at nano-scale.  Quantum-dot Cellular Automata (QCA) is a system with low power consumption and a potentially high density and regularity. Also, QCA supports the new devices with nanotechnology architecture. This technique works </...

Elliptic Curve Cryptography (ECC) based security protocols require much shorter key space which makes ECC the most suitable option for resource-limited devices as compared to other public cryptography (PKC) schemes. This paper presents a highly efficient area-delay optimized crypto processor over general prime field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="h...

With the continually increasing need for transmission of digital data over noisy channels, need for error control and correction techniques are also raising as well. There are various techniques and methods available for transmission of digital data over noisy channel but Viterbi Decoder is most efficient .It provides better coding gain at lower cost and good performance Convolutional encoding ...

The proposed architecture carried out makes use of n iterations to produce the final value of the function upto an accuracy of n bits. A two’s complement 4bit carry-look ahead adder/subtractor block with carry-save has been implemented as part of the architecture for greater speed. An 8-bit barrel shifter has been implemented for use in the algorithm. An optimum use of edge-triggered latches an...

The research work presented in this thesis focuses on the development of techniques specific to surveillance videos for efficient video compression with better processing speed. The Scalable Video Coding (SVC) techniques are explored to achieve better compression efficiency. The framework of SVC is modified to support Surveillance Centric Coding (SCC). Motion estimation techniques specific to s...

The Residue Number System (RNS) is an efficient alternative number system which has been attracted researchers for over three decades. In RNS, arithmetic operations such as addition and multiplication can be performed on residues without carry-propagation between them; resulting in parallel arithmetic and high-speed hardware implementations (Parhami, 2000; Mohan, 2002; Omondi & Premkumar, 2007)...

The performance of Blind Source Separation (BSS) using Independent Component Analysis (ICA) declines significantly in a reverberant environment. The degradation is mainly caused by the residual crosstalk components derived from the reverberation of the jammer signal. This paper describes a post-processing method designed to refine output signals obtained by BSS. We propose a new method which us...