⎯ In this paper, we present a comprehensive experimental assessment of fault coverage for a fault-tolerant VLIW processor, which consists of the error detection, error rollback recovery and reconfiguration mechanisms. We implement the proposed design of fault-tolerant VLIW in VHDL and employ the fault injection to investigate the effects of fault duration, workload variation and the number of r...

Within Philips Research Labs, we are investigating the 64bit VLIW core for future TriMedia processors. We have performed an extensive Design Space Exploration (DSE) on this core using quantitative analysis, using a benchmark suite of applications which are representative for multimedia processing. We have explored, among others, the configurations of the different functional units (FUs) of the ...

Instruction scheduling is a crucial phase in a compiler for very long instruction word (VLIW) processors. This paper describes the instruction scheduler of the second generation compiler for the TriMedia VLIW mediaprocessor family as well as related compiler issues to increase the size of a scheduling unit. The paper discusses the guarded decision tree scheduling unit, how guarded decision tree...

The power dissipation of a VLIW processor is investigated across a series multimedia benchmarks, from grayscale image compress algorithm to the most advanced speech codec H.264, to characterize their behavior. Based on this study, a run-time power modeling is proposed to achieve fast and accurate estimation. The model shows its ability to predict the validating sequence’s cumulative energy cons...

This work presents floating-point division algorithms and implementations for embedded VLIW integer processors. On those processors, there is no hardware floatingpoint unit, for cost reasons. But, for portability and/or accuracy reasons, a software floating-point emulation layer is sometime useful. In this paper, we focus on high-radix digit-recurrence algorithms for floating-point division on ...

1. Microprocessors 1.1. Basic Definitions of Microprocessors 1.2. The Early Days of Microprocessors 1.3. The Era of RISC Microprocessors 1.4. Superscalar Microprocessors 1.5. VLIW Microprocessors 1.6. CISC, RISC, and VLIW Architectures Comparison 1.7. Multi-threaded and Multi-core Microprocessors 1.8. Future Directions for Multi-core Microprocessors 2. Digital Signal Processors 2.1. A Bird’s Ey...