This paper proposes a new approach for analog portion testing, which can meet requirements for high-speed and high-accuracy testing simultaneously with reasonable cost. The key concept of the new method is cooperation of an LSI tester and some circuitry built in a target SoC device. We will explain the operation principle of the proposed method. The proposed method can be one of the methods to ...

The paper demonstrates an efficient process flow for the Hardware Testing of ASIC (Application Specific Integrated Circuit). procedure is implied on Comparator, ADC (Analog-to-Digital) and Present Cipher Crypto ASIC. This involves testing functionality Analog, Digital Mixed Signal design results obtained during functional are verified through simulations Cadence, in case comparator ASIC, vivado...

In the high-resolution analog circuit, performance of chips is an important part. The needs to be determined by testing. According test requirements, stimulus signal with better quality and necessary. main research direction how generate high-speed when there no suitable digital-to-analog converter (DAC) chip available. this paper, we take analog-to-digital (ADC) as example; article uses DAC mu...

In this thesis three novel analog techniques for testing CMOS Integrated circuits are presented. These techniques are based on analog circuits since they offer a number of important advantages compared to standard digital test techniques, such us less silicon area, lower power consumption and high operating speed. Therefore, the proposed techniques can be embedded in the circuit under test, con...

− When testing an analog-to-digital converter (ADC) by automatic test equipment (ATE), the latter is capable of performing extensive processing of output responses of the ADC. This allows detection of virtually any fault. However, the cost of ATE is quite high. As well, the external bandwidth of ATE is normally lower than the internal bandwidth of the ADC being tested, which makes it difficult ...

New static and dynamic analog-to-digital converter (ADC) testing techniques are revised and discussed. A new test method based on the Histogram Method but using small-amplitude triangular waves with a variable offset is shown to have several advantages over the traditional static test, namely a dramatic reduction in test duration even for highresolution ADCs. The use of Gaussian noise to stimul...

This paper presents application of Neural classifier with High pass filter(HPF) to examine its own functional health, to speed up test time and to facilitate fault diagnosis Here we presents an application to insert a built in test block to test any complicated analog circuit in terms of performance while considering tolerance factor. Testing block which is to be added in the chip contains Syna...