Electronic Design Automation (EDA) is the most common approach for the fast design and implementation of large, complex ASICs and SOCs. We introduce an asynchronous EDA methodology that can be used to realize asynchronous circuits using conventional EDA tools and conventional technology libraries, starting from a synchronous synthesizable specification. It provides the key advantages of asynchr...

We introduce a new design style called extended burst-mode. The extended burst-mode design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to synchronous. We can synthesize multiple-input change asynchronous finite state machines, and many circuits that fall in the gray area (hard to classify as synchronous or asynchronous) which are difficult or impossible to...

In the today’s era, reversible logics are the promising technology for the designing of low power digital logic system having major application in the field of nanotechnology, quantum computation, DNA and other low power digital circuits. Reversible logics provide zero power dissipation (Ideally) in the digital operations. There are numbers of circuit designed by the reversible logics and seque...

In this paper, the design of pre-settable adiabatic flip-flops and sequential circuits based on the newly proposed Energy efficient adiabatic Logic (EEAL) is presented. EEAL is based on differential cascode voltage swing (DCVS) logic, uses only a single sinusoidal source as supply-clock. This not only ensures lower energy dissipation, but also simplifies the clock design which would be otherwis...

We propose an all spin state element to enable all spin state machines using spin currents and nanomagnets. We demonstrate via numerical simulations the operation of a state element a critical building block for synchronous, sequential logic computation. The numerical models encompass Landau-Lifshitz-Gilbert (LLG) nanomagnet dynamics with stochastic models and vector spin-transport in metallic ...

C-elements are used widely in asynchronous VLSI circuits. Fabrication faults in some CMOS C-elements can be undetectable by logic testing. Testable designs of static symmetric and asymmetric C-elements are given in this report which provide for the detection of single line stuck-at and stuck-open faults. We show that driving feedback transistors in the proposed testable static C-elements transf...

C-elements are used widely in asynchronous VLSI circuits. Fabrication faults in some C-elements can be undetectable by logic testing. Testable designs of static CMOS Celements are given in this paper which provide for the detection of single line stuck-at and stuck-open faults. We show that driving the feedback transistors in the proposed testable static C-element transforms its sequential func...

In the celebrated Gödel Prize winning papers, Herlihy, Shavit, Saks and Zaharoglou gave topological characterization of waitfree computation. In this paper, we characterize waitfree communication logically. First, we give an intuitionistic epistemic logic K∨ for asynchronous communication. The semantics for the logic K∨ is an abstraction of Herlihy and Shavit’s topological model. In the same wa...

In recent literature, Reversible logic has become one of the promising arena in low power dissipating circuit design in the past few years and has found its applications in low power CMOS circuits , optical information processing and nanotechnology. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. This paper presents asynchrono...

A spiking neuron model described by an asynchronous cellular automaton is introduced. Our model can be implemented as an asynchronous sequential logic circuit and its control parameter is adjustable after implementation in an FPGA. It is shown that our model can reproduce twenty types of dynamic response behaviors observed in biological and other model neurons. It is also shown that our model c...