As the number, and diversity, of computer aided design tools used by VLSI circuit designers continues to grow, the need for CAD frameworks increases. While a precise definition of a CAD framework is difficult to give, it is convenient to view a CAD framework as a collection of underlying facilities and services that support activities performed by CAD tool developers, CAD system integrators, an...

The ever increasingly number of transistors possible in VLSI circuits compounds the diiculty in ensuring correct designs. Formal veriication has been touted as a means of overcoming this problem, but most of the work in this area has been directed at standalone theorem provers. Before veriication is accepted by the VLSI design community, the stand alone veriication tools that are in use in the ...

During the last decade, the complexity and size of circuits have been rapidly increasing, placing a stressing demand on industry for faster and more efficient CAD tools for VLSI circuit layout. One major problem is the computational requirements for optimizing the place and route operations of a VLSI circuit. Thus, this paper investigates the feasibility of using reconfigurable computing platfo...

Wave-pipelining is a method of high-performance circuit design which implements pipelin-ing in logic without the use of intermediate latches or registers. This paper presents a tutorial of the principles of wave-pipelining and a survey of recent wave-pipelined VLSI chips and CAD tools for the synthesis and analysis of wave-pipelined circuits. Wave-pipelining has recently drawn considerable inte...

The introductory VLSI design course at the University of Michigan has been ooered for over 10 years. More recently, it has been reorganized around a microprocessor design project. This paper describes the course philosophy and content, and the baseline project from which class projects begin. The introductory VLSI course, EECS427, teaches mask-level layout and integrated circuit design veriicat...

We empirically assess the implications of fixed terminals for hypergraph partitioning heuristics. Our experimental testbed incorporates a leading-edge multilevel hypergraph partitioner and IBM-internal circuits that have recently been released as part of the ISPD-98 Benchmark Suite. We find that the presence of fixed terminals can make a partitioning instance considerably easier (possibly to th...

Due to advent of Very Large Scale Integration (VLSI), mainly due to rapid advances in integration technologies the electronics industry has achieved a phenomenal growth over the last two decades. Various applications of VLSI circuits in high-performance computing, telecommunications, and consumer electronics has been expanding progressively, and at a very hasty pace. Steady advances in semi-con...

This paper presents an overview of the techniques used for solving optimization problems, in the area of VLSI Physical Computer Aided Design. The material is presented in the form of a general introduction, without going into quantitative or theoretic details. The work describes fundamental aspects of topics such as simulated annealing, genetic algorithms, linear programming, integer programmin...