نتایج جستجو برای: chip optical interconnects
تعداد نتایج: 315995 فیلتر نتایج به سال:
We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s....
Interconnect has become a primary bottleneck in the integrated circuit design process. As CMOS technology is scaled, the design requirements of delay, power, bandwidth, and noise due to the on-chip interconnects have become increasingly stringent. New design challenges are continuously emerging, such as delay uncertainty induced by process and environmental variations. It has become increasingl...
With technology scaling, growing wire delays and excess power dissipation of current metallic interconnects are predicted to significantly limit the performance of Networkon-Chips (NoCs) architectures. Recent research has focused on developing alternate solutions to current metallic interconnects. One potential solution is silicon photonics because of its higher bandwidth, reduced power dissipa...
Optical waveguide interconnects are a major component of chip-scale data processing and computational systems. Here, we propose an alternative mechanism based on optical wireless broadcasting links using nanoantennas, which may overcome some of the limitations of nanoscale waveguide interconnects. By properly loading and matching nanoantenna pairs with optical nanocircuits, we theoretically dem...
E-mail: y-ishikawa@material. t.u-tokyo.ac.jp Si photonics has attracted much interest over the last decade as it allows integration of photonic and electronic devices on a small Si chip, providing highcapacity, energy-efficient, and cost-effective optical interconnects. Active optical cables based on Si photonics are now commercially available for rack-to-rack interconnects in supercomputers an...
Three decades ago Gordon Moore predicted that number of transistors per integrated circuit (IC) would double every two years. Today the high performance ICs are counting upto two billion of transistors and working at 10 GHz clock frequencies. The on chip interconnects are going to be a major bottleneck to the performance of such ICs. The use of copper interconnects & low K dielectrics has provi...
The recent emergence of multicore architectures and chip multiprocessors (CMPs) has accelerated the bandwidth requirements in high-performance processors for both on-chip and off-chip interconnects. For next generation computing clusters, the delivery of scalable power efficient off-chip communications to each compute node has emerged as a key bottleneck to realizing the full computational perf...
In deep submicron (DSM) VLSI technologies, it is becoming increasingly harder for a copper based electrical interconnect fabric to satisfy the multiple design requirements of delay, power, bandwidth, and delay uncertainty. This is because electrical interconnects are becoming increasingly susceptible to parasitic resistance and capacitance with shrinking process technology and rising clock freq...
Future advances in the application of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs) [1]. These will make use of new device-level components such as arrays of Vertical Cavity Surface Emitting Lasers (VCSEL's) [2] or arrays of Micro Cavity Light-Emitting Diodes (MCLED’s) [3] and low power photoreceiver circuits [4]. One of the challenge...
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