A decision-feedback MAP receiver for time-selective fading CDMA channels is proposed. The receiver consists of a sequence-matched jilter and a MAP demodulator Output samples from the matched~lter are fed into the MAP demodulator The MAP demodulator exploits the channel memory by delaying the decision and using a sequence of observations. This receiver also rejects MAI and estimates channel fadi...

Ultra-small modulator and demodulator for 10 Gb/s differential phase-shift-keying (DPSK), using silicon-based microrings, are proposed. A single-waveguide microring modulator with over-coupling between ring and waveguide generates a DPSK signal, while a double-waveguide microring filter enables balanced DPSK detection. These modulator and demodulator are characterized. A trade-off between patte...

In this paper an unconventional, simple BPSK demodulator is proposed. Complexity of the conventional BPSK demodulator is reduced by utilizing a l-bit Analog-to-Digital (A/D) converter front-end. The optimal detection rule is derived for BPSK signals going through the l-bit A/D front-end. The key element of the optimal demodulation process is a pair of weighting factors that act as phase referen...

I/Q demodulation is a common and useful RF signal processing technique used in charged-particle accelerators. When implemented with conventional analog RF components, a number of inherent errors can degrade the I/Q Demodulator performance, including gain balance, quadrature-phase balance, DC offsets, impedance match, and carrier leakage. Recent advances in high-speed analog-to-digital converter...

We have implemented the digital section of a wireless local area network (WLAN) demodulator in a reconfigurable interface card called the PCI Pamette. The entire baseband section of the demodulator has been implemented in the Pamette and a simple analog to digital mezzanine board. This is the second implementation of the demodulator, the first being a card-based design using a mixture of discre...

I/Q demodulation is a common and useful RF signal processing technique used in charged-particle accelerators. When implemented with conventional analog RF components, a number of inherent errors can degrade the I/Q Demodulator performance, including gain balance, quadrature-phase balance, DC offsets, impedance match, and carrier leakage. Recent advances in high-speed analog-to-digital converter...

This paper describes the algorithm and implementation details of a new DSP based 64 Kbps Demodulator developed for onboard application. This demodulator has the capability of unequal error protection (UEP) based on multiple block coded modulation (MBCM). The software is run on ADSP-21020 simulator and MATLAB. The demodulator is tested by comparing the results of DSP simulation with original mod...

A Silicon-on-Insulator (SOI) Differential Quadrature Phase Shift Keying (DQPSK) demodulator based on a novel Multimode Interference (MMI) design is characterized for a number of operating wavelengths, with results indicating good uniformity and low wavelength dependency. Keywordssilicon integrated devices; DQPSK demodulator; MMI; characterization

A baseband digital narrow-band FM receiver, called zero-intermediate frequency zero-crossing demodulator (ZIFZCD), has been recently developed. This demodulator may offer low complexity and simple implementation. However, the bit error rate (BER) performance of the ZIFZCD is inferior to that of the limiter-discriminator-integrate-and-dump (LDI) demodulator. In this paper, a simple decision feed...