Multi-gate MOSFETs has shown better results in subthreshold performances. The replacement of SiO2 by high-k dielectric can fulfill the requirements of Multi-gate MOSFETS with scaling trend in device dimensions. The advancement in fabrication technology has also boosted the use of different high K dielectric materials as oxide layer at different places in MOSFET structures. One of the most impor...

<span>This paper studies the impact of fin width channel on temperature and electrical characteristics field-effect transistor (FinFET). The simulation tool multi-gate field effect (MuGFET) has been used to examine FinFET characteristics. Transfer with various temperatures (W<sub>F</sub>=5, 10, 20, 40, 80 nm) are at first simulated in this study. results show that increasing e...

In this paper, the general characteristics and the scalability of Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are introduced and reviewed. The most important factors, i.e., interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are estimated using equivalent circuit method. The extracted interface trap density, lifeti...

This paper investigates the origins of sub-threshold slope degradation in vertical MOSFETs (v-MOSFETs) due to dry etching of the polysilicon surround gate. Control v-MOSFETs exhibit a degradation of subthreshold slope as the channel length is reduced from 250 to 100 nm, with 100 nm transistors having a value of 125 mV/dec and a DIBL of 210 mV/V. The effect of the polysilicon gate etch is invest...

In this work, we study the impact of random interface traps (RITs) at the interface of SiO x /Si on the electrical characteristic of 16-nm-gate high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices. Under the same threshold voltage, the effects of RIT position and number on the degradation of electrical characteristics are clarified with respect to different levels of ...

A two-dimensional analytical model for the potential distribution along the bottom channel of the fully depleted region of dual material gate (DMG) SOI MESFET is presented. The potential distribution is modeled by solving the Poisson equation with proper boundary conditions. The model for the potential distribution is extended to derive an analytical expression for the threshold voltage. The ac...