This paper is devoted for designing high speed arithmetic logic unit. All of us know that ALU is a module which can perform arithmetic and logic operations. The reason behind choosing this topic as a research work is that, ALU is the key element of digital processors like as microprocessors, microcontrollers, central processing unit etc. Every digital domain based technology depends upon the op...

High precision arithmetic can improve the convergence of Krylov subspace methods; however, it is very costly. One system of high precision arithmetic is double-double (DD) arithmetic, which uses more than 20 double precision operations for one DD operation. We accelerated DD arithmetic using AVX SIMD instructions. The performances of vector operations in 4 threads are 51-59% of peak performance...

This paper describes the logical structure of the RC 4000, a 24-bit, binary computer designed for multiprogramming operation. The design is characterized by multiple accumulators, expandable storage, low-speed and high-speed data channels, storage protection, and program interruption. Processing operations include byte manipulation, word comparison, and integer and floating-point arithmetic. Ty...

It is relatively easy to obtain good computational speed on many high-speed computers when computations with dense matrix techniques are performed. This explains why very eecient subroutines have been developed for dense matrix computations. On some computers, as on the new CRAY models, the speed obtained in this situation is near the top-performance given by the manifactures. However, both the...

Computer arithmetic is predominantly performed using binary arithmetic because the hardware implementations of the operations are simpler than those for decimal computation. However, many decimal fractions cannot be represented exactly as binary fractions with a finite number of bits. The value 0.1, for example, can only be represented as an infinitely recurring binary number. If a binary appro...

We consider precise rational-fractional calculations for distributed computing environments with an MPI interface for the algorithmic analysis of large-scale problems sensitive to rounding errors in their software implementation. We can achieve additional software efficacy through applying heterogeneous computer systems that execute, in parallel, local arithmetic operations with large numbers o...

Residue Number System (RNS) are becoming popular for designing high performance DSP processors because of their ability to offer carry free arithmetic operation. The carry free operations lead to concurrent execution of arithmetic operations on the residues. However in RNS, moduli selection is one of the most important parameter that determines bit efficiency, area, power consumption, speed etc...

In this paper we present the design of a rigorous, high precision floating point arithmetic. The algorithms presented are implementation in FORTRAN, and are made available through the COSY INFINITY rigorous computation package. The three design objectives for these high precision intervals are high speed, particularly for the elementary operations, absolutely rigorous treatment of roundoff erro...

The residue number system (RNS) has computational advantages for large integer arithmetic because of its parallel carry free, and high-speed arithmetic nature. However, magnitude comparison is a very complex operation for RNS. This paper presents a new comparison algorithm based on the modification of Mixed-Radix Conversion II technique. The new algorithm uses small modulo operations only and h...

This paper presents a High speed, optimized multiplier architecture for a dual-field (DF) processor for elliptic curve cryptography (ECC). This processor can support the required operations in both galois prime field GF(p) and binary field GF(2). The performance of the processor is enhanced by the judicious selection of proper type of coordinates in the arithmetic unit. The arithmetic unit is d...