In the era of gigascale integration, both interconnect technologist and interconnect circuit designers must work together closely to ensure that the integrated circuit (IC) industry will overcome current and future interconnect limits on system performance, power dissipation, noise, and cost. This paper will review wave-pipelined interconnect circuits that are used to enhance wire performance a...

As the integrated circuits (ICs) are scaled into nanometer dimensions and operate in giga-hertz frequencies, interconnect design and optimization have become critical in determining system performance and reliability. This paper presents the ongoing research effort at UCLA to develop an interconnect-centric design flow, including interconnect planning, interconnect synthesis, and interconnect l...

Deep submicron technology makes interconnect one of the main factors determining the circuit performance. Previous work shows that interconnect parameters exhibit a significant amount of spatial variation. In this work, we develop approaches to study the influence of the interconnect variation on circuit performance and to evaluate the circuit sensitivity to interconnect parameters. First, an a...

A priori interconnect prediction and technology extrapolation are closely intertwined. Interconnect predictions are at the core of technology extrapolation models of achievable system power, area density and speed. Technology extrapolation, in turn, informs a priori interconnect prediction via models of interconnect technology and interconnect optimizations. In this paper, we address the linkag...

This paper presents an interconnect-driven floorplanning (IDFP) flow and algorithm integrated with multi-layer global wiring planning (GWP). It considers a number of interconnect performance optimizations during floorplanning, including interconnect topology optimization, layer assignment, buffer insertion, wire sizing and spacing. It also includes fast routability estimation and performance-dr...

This paper compares the performance in terms of delay and power of Multi Walled Carbon Nanotubes (MWCNT)based interconnects at 22nm technology node. Similar analysis is carried out for copper based interconnect and results are compared with MWCNT at different interconnect lengths. This analysis shows that due to low resistance and inductance MWCNT bundle interconnect is of lower delay and power...