The problem of fault detection and isolation of parametric faults is considered in this paper. A fault detection problem based on parametric faults are associated with internal parameter variations in the dynamical system. A fault detection and isolation method for parametric faults is formulated in a standard setup and a synthesis method for the fault detector is given. Further, fault detectio...

Aim of this paper is to protect a transmission line section/feeder from internal faults by means of differential protection through a microprocessor. The conventional differential relay operates on the circulating current principle, which involves a direct comparison of the magnitude and phase of the currents entering and leaving the protected equipment or line section. The present scheme is ba...

The aim of this paper is to extend a hybrid protection plan for Power Transformer (PT) based on MRA-KSIR-SSVM. This paper offers a new scheme for protection of power transformers to distinguish internal faults from inrush currents. Some significant characteristics of differential currents in the real PT operating circumstances are extracted. In this paper, Multi Resolution Analysis (MRA) is use...

LEADING VLSl CHIP and digital system manufacturers report an increasing number of undetected temporary faults that cause permanent damage in general-purpose microprocessor-based systems.’ Clearly, modern VLSI circuits require higher reliability as traditional means of protection against temporaiy faults become insufficient. This need renewed interest in self-checking circuits for on-line error ...

In this paper, a novel method is presented for detection and classification of the faultyphase/region in the stator winding of synchronous generators on the basis of the resulting harmoniccomponents that appear in the terminal voltage waveforms. Analytical results obtained through DecisionTree (DT) show that the internal faults are not only detectable but also they can be classified andthe rela...

In testing sequential circuits, internal faults in the storage elements (SEs) are sometimes modeled as stuck-at faults in the combinational circuits surrounding the SE. The detection of some transistor-level faults that cannot be modeled as stuck-at are considered. These feed-through faults, cause the cell to become either data-feed-through, which makes the cell combinational, or clockfeed-thro...

A doubly-fed induction generator’s (DFIG’s) sensitivity to external faults has motivated researchers to investigate the impact of various grid disturbances, such as voltage sags and short circuit faults, on its low-voltage ride-through (LVRT) capability. However, no attention has been paid to the impact of internal faults in voltage source converters (VSCs), that interface a DFIG with the grid,...

The use of efficient signal processing tools (SPTs) to extract proper indices for the fault detection in induction motors (IMs) is the essential part of any fault recognition procedure. The 2nd part of this two-part paper is, in turn, divided into two parts. Part two covers the signal processing techniques which can be applied to non-stationary conditions. In this paper, all utilized SPTs for n...

We present a new fault exposure and localization approach intended to increase the effectiveness of regression testing. In particular, we extend traditional regression testing, which strongly focuses on black box comparisons, to compare internal program states. These value spectra differences allow a more detailed comparison of executions of the new and old versions of a program. In particular,...

On the basis of analyzing high-voltage direct current (HVDC) transmission system and its fault superimposed circuit, the direction of the fault components of the voltage and the current measured at one end of transmission line is certified to be different for internal faults and external faults. As an estimate of the differences between two signals, relative entropy is an effective parameter fo...