A 4x4 bit multiplier is demonstrated based on the Chinese abacus. As comparing the simulation result of this work with the speed and power consumption of the 4x4 bits Braun array multiplier, the delays of the 4-bit abacus multiplier are 19.7% and 10.6% less than that of Braun array multiplier with 0.35μm and 0.18μm technologies, respectively. Meanwhile, the power consumption of the 4-bit abacus...

A 4x4 and 8x8 bit multiplier is demonstrated based on the Chinese abacus. As comparing the simulation result of this work with the speed of the 4x4 and 8x8 bits Braun array multiplier, the delays of the 8-bit abacus multiplier are 14% and 7.5% less than that of Braun array multiplier with 0.35μm and 0.18μm technologies, respectively. Meanwhile, the power consumption of the 8-bit abacus multipli...

Two’s complement multipliers are important for a wide range of applications. Paper describes a technique to reduce by one row the maximum height of the partial product array generated by Radix-4 Booth’s multiplier, without any increase in the delay of the partial product generation stage. The design of 8 bit and 16 bit multiplication scheme using different types of multiplier like Array multipl...

Multiplier is one of the essential element for all digital systems such as digital signal processors, microprocessors etc. In this paper, a new high speed multiplier using booth recoding technique is presented. This algorithm can be implemented by using the radix-8 booth recoding process. The proposed multiplier reduces the partial product array by almost 3/4 th the size of the bits. This reduc...

the present paper is an attempt to: 1- demonstrate how money is created (by the nature of the system), and to estimate the inflation resulting from monetary factors in both usurious and non-usurious systems. operational aspects of islamic and non-islamic banking systems are compared. 2- introduce a corrective term to be added to the multiplier of the supply of money, in order to prevent the und...

in this paper, we introduce the notion of multiplier in -algebra and study relationships between multipliers and some special mappings, likeness closure operators, homomorphisms and ( -derivations in -algebras. we introduce the concept of idempotent multipliers in bl-algebra and weak congruence and obtain an interconnection between idempotent multipliers and weak congruences. also, we introduce...

Physical limitations of Complementary Metal-Oxide-Semiconductors (CMOS) technology at nanoscale and high cost of lithography have provided the platform for creating Quantum-dot Cellular Automata (QCA)-based hardware. The QCA is a new technology that promises smaller, cheaper and faster electronic circuits, and has been regarded as an effective solution for scalability problems in CMOS technolog...

The paper presents the concepts behind the "Urdhva Tiryagbhyam Sutra" and "Nikhilam Sutra" multiplication techniques. It then shows the architecture for a 16×16 Vedic multiplier module using Urdhva Tiryagbhyam Sutra. The paper then extends multiplication to 16×16 Vedic multiplier using "Nikhilam Sutra" technique. The 16×16 Vedic multiplier module using Urdhva Tiryagbhyam Sutra uses four 8×8 Ved...

In this paper different low power 8x8 bit multipliers which are implemented with Tanner Tool v13.0 at 250MHz and 500MHz frequency with 65nm technology which is having a supply voltage 1.0v. There are different CMOS multiplier circuits are analyzed which are Array multiplier, Wallace tree multiplier, Row bypass Braun multiplier, Column bypass Braun multiplier, Row and Column bypass Braun multipl...

This paper presents the design and implementation of signed-unsigned Modified Booth Encoding (SUMBE) multiplier. The present Modified Booth Encoding (MBE) multiplier and the Baugh-Wooley multiplier perform multiplication operation on signed numbers only. The array multiplier and Braun array multipliers perform multiplication operation on unsigned numbers only. Thus, the requisite of the modern ...