This paper presents a new compensation method for fully differential two-stage CMOS operational transconductance amplifiers (OTAs). It employs a hybrid cascode compensation scheme, merged Ahuja and improved Ahuja style compensations, for fast settling. A design procedure for minimum settling time of the proposed compensation technique for a two-stage class A/AB OTA is described. To demonstrate ...

We develop an inventory model to determine optimal ordering policy under permissible delay in payment by considering demand rate to be stock dependent. Mathematical models are derived under two different cases: credit period being greater than or equal to cycle time for settling the account, and credit period being less than or equal to cycle time for settling the account. The results are illus...

Finite settling time control of the double integrator is considered. The approach taken is to design a compensator based on a virtual lossless absorber which is tuned so that, at some predetermined time, the virtual subsystem possesses all of the system’s energy. At this time the controller is turned off, and the double integrator remains at rest at the origin. This strategy gives the appearanc...

We describe a Gröbner basis of relations among conditional probabilities in a discrete probability space, with any set of conditioned-upon events. They may be specialized to the partially-observed random variable case, the purely conditional case, and other special cases. We also investigate the connection to generalized permutohedra and describe a “conditional probability simplex.” 1 Relations...

To each computable enumerable (c.e.) set A with a particular enumeration {As}s∈ω, there is associated a settling function mA(x), where mA(x) is the last stage when a number less than or equal to x was enumerated into A. One c.e. set A is settling time dominated by another set B (B >st A) if for every computable function f , for all but finitely many x, mB(x) > f(mA(x)). This settling-time order...

given by (6) can successfully shorten the settling time of h e tracking control at different operation speeds. In our experimental setup the settling time is in the range of 0.50 N 0.65 s for the conveyor belt running between 9.43 N 26.60 c d s . As we have seen, this is a great improvement in the tracking control compared with that where no special care is taken to compensate for the feedback ...

The paper utilizes the Virtual Reference Feedback Tuning methodology for the iterative way of controller design and fine-tuning. It uses a series of experiments with no restriction on data generation to design an optimal controller of desired structure without the intermediate plant identification step. The approach is shown to be successful for the design and fine-tuning of a controller for a ...

in this approach, the left ventricular assist pump for patients with left ventricular failure isused. the failure of the left ventricle is the most common heart disease during these days. inthis article, a state feedback controller method is used to optimize the efficiency of a samplingpump current. particle swarm algorithm, which is a set of rules to update the position andvelocity, is applied...

Settling time is one of the most important parameter in design of DLLs. In this paper we propose a new high speed with low settling time Delay Locked Loop (DLL) in which a digital signal processor (DSP) is used instead of using phase-frequency detector, charge pump and loop filter in conventional DLL. To have better settling time, PRP conjugate gradient algorithm is used to optimize delay of ea...