We show that deep level doping of Czochralski-grown silicon wafers is capable of providing high resistivity handle wafers suitable for radio frequency integrated circuits. Starting from n-type Czochralski silicon wafers having a nominal resistivity of 50 cm, we use ion implantation and subsequent annealing to increase the resistivity of the wafers to over 10 k cm at room temperature. Coplanar w...

2014 Silicon as a substrate material will continue to dominate the market of integrated circuits for many years. We first review how crystal pulling procedures impact the quality of silicon. We then investigate how thermal treatments affect the behaviour of oxygen and carbon, and how, as a result, the quality of silicon wafers evolves. Gettering techniques are then presented. We conclude by det...

The paper deals with the measurement of the radius of curvature of silicon wafer surface. The aim of these measurements was to determine stresses generated during oxidation of silicon wafers. A greater molar volume of SiO2 layer in relation to the substrate material causes changes in the shape of oxidized surface, which results in stresses in both silicon dioxide layer and silicon. These change...

Enhanced hydrophobic bond-strength can be achieved by exposing prime grade silicon wafers to ultraviolet (UV) light and heat prior to bonding. The following independent variables were explored: platen temperature, UV exposure time, oxygen containing versus non-oxygen containing (nitrogen only) bonding atmosphere, and annealing temperature. The results suggest exposure to UV can be used as an ac...

MEMS is an acronym for Microelectro Mechanical Systems, it defines mechanical structures fabricated with IC processing on (most often) silicon wafers. In Europe, MEMS is labeled Microsystems and in Japan it is labeled Micromachines. The term MEMS evolved in the United States in the 1990s. Prior to that period the technology was labeled silicon micromachining . MEMS defines the technology; not s...

The great majority of solar cells manufactured today are based on p-type silicon wafers. However, the most efficient modules are made with n-type silicon wafers. This is primarily due to the much greater tolerance of n-type silicon to the dominant defects in p-type material. In this paper we discuss some of the potential advantages and disadvantages of using por n-type silicon for industrial so...

Enhanced hydrophobic bond-strength can be achieved by exposing prime grade silicon wafers to ultraviolet (UV) light and heat prior to bonding. The following independent variables were explored: platen temperature, UV exposure time, oxygen containing versus non-oxygen containing (nitrogen only) bonding atmosphere, and annealing temperature. The results suggest exposure to UV can be used as an ac...

A systematic comparison of frontand rear-emitter silicon heterojunction solar cells produced on nand p-type wafers was performed, in order to investigate their potential and limitations for high efficiencies. Cells on p-type wafers suffer from reduced minority carrier lifetime in the low-carrier-injection range, mainly due to the asymmetry in interface defect capture cross sections. This leads ...

Multilayer mirrors capable of > 99.9% reflectivity in the far infrared (70-200 microm wavelengths) were constructed using thin silicon etalons separated by empty gaps. Calculations indicate that only three periods are required to produce 99.9% reflectivity because of the large difference between the index of refraction of silicon (3.384) and the vacuum (1). The mirror was assembled from high-pu...