We investigate the use of synchronous languages to model partially asynchronous systems. Through the use of intermittent activations and assertions, synchronous processes can be composed according to various asynchronous models. Common synchronization and communication mechanisms can be described. The resulting descriptions can be simulated and verified, using classical tools of synchronous pro...

This paper presents an FPGA architecture that combines synchronous and asynchronous architectures. Datapath components such as logic blocks and switch blocks are designed so as to run in asynchronous and synchronous modes. Moreover, a logic block is presented that implements area-efficient First-in-first-out(FIOF) interfaces, which are usually used for communication between synchronous and asyn...

Secure multi-party computation (MPC) allows a set of n players to securely compute an agreed function of their inputs, even when up to t players are under the control of an adversary. Known asynchronous MPC protocols require communication of at least Ω(n) (with cryptographic security), respectively Ω(n) (with information-theoretic security, but with error probability and non-optimal resilience)...

Computer-mediated communication (CMC) has been adopted in most e-learning settings. However, few research studies have considered the effect of different CMC. This study examined how and why synchronous communication affected participation in online discussions. Two online classes that participated in two asynchronous and two synchronous online discussions were examined. Actual and perceived me...

Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an asynchronous interconnect. Such a scheme can be used for point-to-point communication in a globally asynchronous locally synchronous (GALS) system, a possible methodology for managing the predicted increase in clock do...

The asynchronous communication model provides applications with parallelism, message buffering, and a convenient programming model. In contrast to the synchronous model however, it is inherently associated with policy regarding the management and delivery of buffered messages. Communication partners are dependent on controlling these policies in order to achieve additional semantics and perform...

In this paper we show how a distributed system with synchronous processors and asynchronous message delays can be simulated by a system with both asvn chronous processors arid asynchronous rnessa.e delays in the presence of vañous types of processor faults. Consequently, the result of Fischer, Lynch and Paterson (1985), that no consensus protocol for asynchronous processors and communication ca...

This dissertation addresses the combined use of asynchronous and synchronous communication in online computer-supported collaborative learning (CSCL) and the relation with students’ motivation. Previously, online communication had been asynchronous and text-based. Technological developments have recently made it possible to support online learning processes by the use of rich synchronous commun...

Asynchronous circuits can provide an elegant and high performance interconnect solution for synchronous systemon-chip (SoC) designs with multiple clock domains. This “globally asynchronous, locally synchronous” (GALS) approach simplifies global timing and synchronization problems, improving performance, reliability, and development time. Fulcrum Microsystems’ SoC interconnect, “Nexus”, includes...

The π-calculus, its asynchronous version and Boudol’s mapping from the former language to the latter one are well-known mathematical objects in theoretical computer science. It is also well-known that the mapping is not fully-abstract w.r.t. most of the semantics defined over these two languages. In this paper we study and fix conditions on the existence of fully-abstract results for Boudol’s m...