In this paper, an optimal approach to design wideband Tapped-Delay Line(TDL) array antenna is proposed. This approach lets us control the array angular and frequency response over a wide frequency band. To this end, some design restrictions are defined and a multi-objective optimization problem is constructed by putting the individual restrictions together. The optimal weights of the TDL proces...

This paper presents a new approach for time series prediction using local dynamic modeling. The proposed method is composed of three blocks: a Time Delay Line that transforms the original time series into a set of N −dimensional vectors, an Information-Theoretic based clustering method that segments the previous set into subspaces of similar vectors and a set of single layer neural networks tha...

In this paper, global models of dynamic complex systems using the neural networks is discussed. The description of a complex system is given by a description of each system element and structure. As a model the multilayer neural networks with the tapped delay line (TDL), which have the same structure as a complex system, are accepted. Two approaches, a global model and a global model with the q...

In this paper the performance of the MMSE-based equalization receivers under overloading conditions is analyzed, for SISO (Single Input, Single Output) and MISO (Multiple Input, Single Output) antenna arrangements. Both random and orthogonal spreading sequences are analyzed, for the main UMTS (Universal Mobile Telecommunications System) TDL (Tapped Delay Line) channel models, namely Pedestrian ...

This paper presents design and implementation of TDC based on time stamping using current balanced logic (CBL) buffer in 0.35 μm CMOS technology. The CBL logic buffer provides smaller delay compared to widely used current starved inverter, allowing better resolution in a given technology node. The CBL buffer based tapped delay line (TDL) provides accurate reference timing signals for time stamp...

This paper deals with the definition and the implementation of a Wideband Directional Channel Model (WDCM) based on the COST 259 recommendations. Cluster of replicas are introduced by means of Tapped Delay Line (TDL). Macro, Micro and Pico cells models are considered in different general radio environments. Proposed channel model can be used in a Link Level Simulator (LLS). A good compromise be...

This paper presents a simple method to determine weights of single carrier multiple input multiple output (MIMO) broadband communication systems adopting tapped delay line (TDL) structure in receiver side for the effective communication under frequency selective fading (FSF) environment. First, assuming the perfect knowledge of the channel matrix in both arrays, an iterative design method of tr...

This article proposes a new calibration method, called the mixed-binning (MB) to pursue high-linearity time-to-digital converters (TDCs) for light detection and ranging applications. The proposed TDCs were developed using tapped delay-line (TDL) cells in field-programmable gate arrays (FPGAs). With MB we implemented resolution-adjustable TDC showing excellent linearity Xilinx UltraScale FPGAs. ...

The Field Programmable Gate Array (FPGA) structure poses several constraints that make the implementation of complex asynchronous circuits such as Time-Mode (TM) almost unfeasible. In particular, in Logic (PL) devices, FPGAs, operation logic is usually synchronous with system clock. However, it can happen a very high-performance specifications demands to abandon this paradigm and follow an impl...

Radio access technologies (RATs) are a key topic in railways, enabling them better service rendering terms of shorter headways between trains, higher safety levels and customer satisfaction. Very often, these railway RATs need lot time to be developed, tested put into service, which implies lack efficiency bottlenecks the evolution systems. To solve this situation, an emulation platform that co...