Progress in semiconductor process technology has made SO1 transistors ons of the most promising candidates for high pertormance and low power designs. With smaller diffusion capacitances, SO1 transistors switch significantly faster than their traditional hulk MOS counterparts and consume less power per switching. However, design and simulation of SO1 MOS circuits is more challenging due to more...

High frequency models of transistors are of interest because they have applications to computeraided design of high frequency circuits. When these models are derived, a problem encountered is that measured transistor S-parameters do not agree with the hybrid-π model. In this article, a simplified method is described to obtain an optimized classical hybrid-π model that predicts the measured S-pa...

the graphical technique for nonlinear circuits was described that enable us to optimize circuits to obtain maximum output power, maximum efficiency or minimum intermodulation. according to this method a high power amplifier in the ka band was designed. using a nonlinear model of the transistor, optimum slope for load-line was determined so that maximum power at the output was obtainable, then ...

In this paper, we describe the development of device models and tools for the design of the carbon nanotube FET (CNFET). Both HSPICE model and Verilog-A model for CNFET including typical device/circuit level non-idealities have been developed. They can be used for design of nanotube transistor circuits as well as to study performance benefits of the new transistor.

Partition noise is closely related to reset noise and has been observed in detection nodes of reset transistor architecture in image sensors. This work presents the analysis of partition noise based on an improved technique for estimation of charge distribution in the transistor channel at any given time instant. We incorporate the transistor turn off transients by taking into account both drif...

Small-signal microwave transistor characteristics are used to construct and fit a comprehensive model of their dynamic behaviour. The model includes thermal effects and trap-related effects, which influences such a large range of frequencies that they are not well characterized by large-signal or pulse measurements alone. Correlation of the model with smallsignal characteristics demonstrates th...

In this paper, a new method of transistor chaining for 1-D automatic leaf cell synthesis is presented. The method allows synthesis of cells suitable for row-based layouts with no restrictions imposed on network topologies/transistor sizes. The novelty of the solution arises from transistor chaining with integrated dynamic transistor folding. We provide the theoretical analysis of transistor fol...

A transistor parameter extraction method is presented where the device heating during the measurement is taken into account. The method utilizes an electrothermal transistor model including thermal feedback, as well as a proper model for the heat diffusion from the active region of the transistor. Here a simple but physically justified model for the thermal spreading impedance of the transistor...

In deep submicron technologies, the noise introduced on signals through the crosstalk coupling is an emerging problem. This paper presents a new analytical MOS transistor model valid in all regions of operation and dedicated to crosstalk noise evaluation and review some useful methods and related work on crosstalk analysis. The same MOS transistor model can be used for the victim and aggressors...