We measured single event upsets (SEUs) and multiple cell upsets (MCUs) of a flip-flop array in a 65nm bulk CMOS process using accelerated white neutron beams. The flipflop array embeds 84,000 FFs constructing a 84,000bit shift register. Its cell structure is so-called tapless, in which no standard cell contains any well tap. Measurement results from 26 DUTs including 2.2Mbit FFs show that both ...