This paper describes a method to fabricate a transplantable three-dimensional (3D) neuronal network using the neurospheroid network (NSN) on a polydimethylsiloxane (PDMS) microchamber array. We developed a technique, termed the “NSN-stamping method”, to transfer the NSN onto other substrates without any chemical treatment. Using this method, we demonstrate that different NSNs were stacked and f...

This paper proposes a Java-based multi-participant 3D graphics application interface to provide 3D graphics and interactive capabilities over network. Two libraries support this interface, one is a 3D graphics library, called JavaGL, and the other is a network library, called JavaNL. The 3D graphics library is almost identical to OpenGL application interface but is written in Java to satisfy th...

Recently researchers have been shifting their focus towards learned 3D shape descriptors from hand-craft ones to better address challenging issues of the deformation and structural variation inherently present in 3D objects. 3D geometric data are often transformed to 3D Voxel grids with regular format in order to be better fed to a deep neural net architecture. However, the computational intrac...

In this paper statistical and time series models are used for determining the random drift of a dynamically Tuned Gyroscope (DTG). This drift is compensated with optimal predictive transfer function. Also nonlinear neural-network and fuzzy-neural models are investigated for prediction and compensation of the random drift. Finally the different models are compared together and their advantages a...

This paper presents a framework for high-level exploration and RTL design of an optimized Network-on-Chip (NoC) architecture for 3D chips. The RTL is derived from the high-level exploration methodology in a semi-automated way. FPGA implementation figures are given for various implementation parameters of the Network Interface Element, demonstrating the performance/area trade-off of 3D NoC archi...

In this paper, we propose a 1-cycle high-performance 3D bufferless router with a 3-stage permutation network. The proposed router utilizes the 3-stage permutation network instead of the serialized switch allocator and 7× 7 crossbar to achieve the frequency of 1.25GHz in TSMC 65nm technology. Compared with the other two 3D bufferless routers, the proposed router occupies less area and consumes l...

We consider the height of random k-trees and k-Apollonian networks. These random graphs are not really trees, but instead have a tree-like structure. The height will be the maximum distance of a vertex from the root. We show that w.h.p. the height of random k-trees and k-Apollonian networks is asymptotic to c log t, where t is the number of vertices, and c = c(k) is given as the solution to a t...