Today, communication systems typically consist of analog hardware, digital hardware and software which are functionally interwoven. Analog circuits usually have limited accuracy and are quite sensitive against harsh environment. To guarantee the robustness of such systems becomes challenging design task. The consideration for the robustness has to be brought to the design at the beginning of th...

This paper presents a new Procedural Analog Design tool called PAD. It is a chart-based design environment dedicated to the design of analog circuits aiming to optimise design and quality by finding good tradeoffs. This interactive tool allows step-by-step design of analog cells by using guidelines for each analog topology. At each step, the user modifies interactively one subset of design para...

Abstract In order to improve performance of analog signal transmission, we recently proposed a novel analog single-carrier transmission with frequency-domain equalization (analog SC-FDE). Additionally, we showed that a joint use of space-time transmit diversity (STTD) and receive antenna diversity significantly improves performance of our proposed analog SC-FDE under a perfect knowledge of chan...

The computer-aided design community is in need of novel methodologies for the verification of analog circuits because of the growing importance of such circuits in embedded system designs. This paper demonstrates a verification flow of analog circuit functional properties. In the proposed approach, system equations are automatically extracted from an analog circuit description by means of bond ...

A JFET-based circuit for realizing a precision and linear floating voltage-controlled resistance (VCR) is presented for use in analog multipliers and programmable analog circuits and as a resistance mirror. It uses a matched JFET pair along with an op amp based negative feedback for realizing a precision resistance and a feedback of the source and drain voltages to the gate for realizing a line...

Although many design tools have been developed for digital design, analog design tools are only just being introduced. This paper presents a new optimization method for automatically sizing the circuit topology of analog cells. This method minimizes a cost function, which depends on a set of designer specifications. It employs the tabu search heuristic to avoid being trapped in a local minimum ...

Hardware implementation of artificial neuron networks (ANN) based on MOS-transistors with floating gates (Neuron MOS or νMOS) is discussed. Comparison of two type on-chip learning neurons with digital and analog input weight storing is provided. The main problem in design the neuron with analog input weight memory is tolerance to deviations of circuit elements parameters and supplied voltage de...

A new type of iterative decoders based on analog computing networks, which are used to decode powerful error-correcting schemes, such as Turbo and Low-density parity-check (LDPC) codes, outperform their digital counterparts in terms of power consumption and speed. Only few analog Turbo decoders, all of them based on CMOS subthreshold technology have been implemented till now. This paper aims to...

In this paper, a novel architecture for self-timed analog-to-digital conversion is presented, designed using the NULL Convention Logic (NCL) paradigm. This analog-to-digital converter (ADC) employs successive approximation and a one-hot encoded masking technique to digitize analog signals. The architecture scales readily to any given resolution by utilizing the one-hot encoded scheme to permit ...

Left atrial and left ventricular volumes, regurgitant flows and systolic efficiencies have been calculated for dogs with and without mitral valve insufficiency, using a technic of electric analog simulation of radioisotope dilution data. Amounts of blood between the valve of the pulmonary artery and the left atrium were calculated by use of mean transit time and flow, and compared to those of t...