The paper describes work at the Polytechnic of Huddersfield on SERC/DTI research project IED 2/1/2121 conducted in collaboration with GEC-Plessey Semiconductors, Wolfson Microelectronics, and UMIST. The aim of the work is to develop generic testing strategies for mixed-signal (mixed analogue and digital) integrated circuits. The paper proposes a test structure for mixed-signal ICs, and details ...

The article describes hardware solutions for the IEEE 802.11 medium access control (MAC) layer and IEEE 802.11a digital baseband in an RF-MIMO WLAN transceiver that performs the signal combining in the analogue domain. Architecture and implementation details of the MAC processor including a hardware accelerator and a 16-bit MACphysical layer (PHY) interface are presented. The proposed hardware ...

Many ASIC companies make it easy to add a PLL, offering the core as a drop-in cell on a standard-cell design or as a cell option in a gate array. However, that seemingly simple addition of a PLL cell to an all-digital ASIC can cause several problems if the ASIC designer isn’t careful. Although much of what is inside a PLL circuit is high-speed digital circuitry, the guts of the PLL include anal...

ii To my dear wife, Liang iii Acknowledgments First, I would like to thank my advisor Professor Larry Pileggi for all his support and continuous guidance throughout the past five years. He opened up a wide variety of research topics that I can explore during my early years at Carnegie Mellon University (CMU) and helped me find my research path that eventually leads to this dissertation. Second,...

The ultimate goal in machine learning is to construct a model function that has generalization capability for unseen dataset, based on given training dataset. If the too much expressibility power, then it may overfit data and as result lose capability. To avoid such overfitting issue, several techniques have been developed classical regime, dropout one effective method. This paper proposes stra...

Continued scaling of CMOS technology affects both, the parameters and the characteristics of MOSFET and the integrated circuit built on them and introduces some new problems in analog design. The reduction of the gate length and the gate oxide thickness led to improvements in terms of chip area, speed and power consumption. At the same time, nonlinear output conductance, reduced voltage gain an...