The evolution of Integrated Circuit designing has been a real game changer in the field of VLSI system in the past quarter century. Very deep sub-micron (VDSM) technologies embracing sub-100nm wafer design technologies, to take advantage of the superior integration possibilities. At these technologies, many phenomena affect gate, path delay or wire delays. Now a days, crosstalk noise or crossta...

Speed-independent circuit design is of increasing interest because of global timing problems in VLSI. Unfortunately, speed-independent design is very subtle. We propose the use of state-machine verification tools to ameliorate this problem. This paper illustrates issues in the modelbng, specification, and verification of speed-independent circuits through consideration of self-timed queues. Use...

Reproducibility of electrophoretic runs depends on the maintenance of a smooth and constant voltage gradient within the supporting medium or separation chamber. Power packs to supply constant current or constant voltage as measured at the pack are readily available, but if such a pack is used with constant voltage, the proportion of the voltage drop available for the electrophoretic separation ...

We investigated acid-base permeability properties of electrically resistive monolayers of alveolar epithelial cells (AEC) grown in primary culture. AEC monolayers were grown on tissue culture-treated polycarbonate filters. Filters were mounted in a partitioned cuvette containing two fluid compartments (apical and basolateral) separated by the adherent monolayer, cells were loaded with the pH-se...

Articles you may be interested in Optimized amorphous silicon oxide buffer layers for silicon heterojunction solar cells with microcrystalline silicon oxide contact layers Enhancing the efficiency of SnS solar cells via band-offset engineering with a zinc oxysulfide buffer layer Appl. Analysis of sub-stoichiometric hydrogenated silicon oxide films for surface passivation of crystalline silicon ...

A new operation mode for a lateral unified-complementary BiCMOS (hereafter abbreviated as U-CBiCMOS) buffer driver based on a partially depleted CMOS/SOI process is proposed. The scheme utilizes a gated npn or pnp BJT inherent to a nor p-channel MOSFET. Forward current is applied to the base terminal of the channel MOSFET, with a normal pull-up or pull-down MOSFET as a current source, where eac...

Buffer-based CMOS filters are maximally simplified circuits containing as few transistors possible. Their applications, among others, include nano to micro watt biomedical sensors that process physiological signals of frequencies from 0.01 Hz about 3 kHz. The order a buffer-based filter is not greater than two. Hence, obtain higher-order filters, cascade second-order constructed. In this paper,...

In this paper we investigate single electron tunneling (SET) devices from the logic design perspective, using the SET tunnel junction’s ability to control the transport of individual electrons. More specifically, we focus on the implementation of a family of Boolean Single Electron Encoded Logic (SEEL) gates, in which the logic values 0 and 1 are encoded as a net charge of 0 or 1 electron charg...

In this work, we investigate heterojunction emitters deposited by Hot-Wire CVD on p-type crystalline silicon. The emitter structure consists of an n-doped film (20 nm) combined with a very thin intrinsic hydrogenated amorphous silicon buffer layer (5 nm). The microstructure of these films has been studied by Spectroscopic Ellipsometry in the UV-visible range. These measurements reveal that the ...

Modern high power electronics devices consists of a large amount of integrated circuits for switching and supply applications. Beside the benefits, the technology exhibits the problem of an ever increasing power density. Nowadays, heat sinks that are directly mounted on a device, are used to reduce the on-chip temperature and dissipate the thermal energy to the environment. This paper presents ...